CDCM61004
(ACTIVE) 1:4 Ultra Low Jitter Crystal-In Clock Generator

Description &
Features
Sample &
Buy
Technical
Documents
Tools &
Software
Support & Community
WEBENCH® Clock Architect - CDCM61004
 
Output Frequency
 
MHz
MHz
MHz
 
 

What is Clock Architect?


Sample & Buy

Free Samples Buy from Authorized Distributors Part # Status Input Level Output Level Price | QTY Package | Pins Device Marking Package QTY | Carrier Distributor Inventory TI 1k Lead Time
Not Available
CDCM61004RHBR ACTIVE LVPECL^ LVDS^ LVCMOS^ XTAL LVPECL^ LVDS^ LVCMOS 3.55 | 1ku VQFN (RHB) | 32 View 3000 | LARGE T&R >5K 1k quantity lead time: In stock
CDCM61004RHBT ACTIVE LVPECL^ LVDS^ LVCMOS^ XTAL LVPECL^ LVDS^ LVCMOS 4.10 | 1ku VQFN (RHB) | 32 View 250 | SMALL T&R >5K 1k quantity lead time: In stock

* Suggested Resale Price per unit (USD) for BUDGETARY USE ONLY. For higher volume price quotes,prices in local currency or delivery quotes, please contact your local Texas Instruments Sales Office or Authorized Distributor.

Technical Documents

Datasheet (1)

Title Type Size (KB) Date Views
PDF 950 03 Jun 2011

User Guides (1)

Title Abstract Type Size (KB) Date Views
PDF 803 02 Mar 2011 934

Selection & Solution Guides (1)

Title Type Size (KB) Date Views
PDF 6000 11 Jul 2013 27,763

Circuit Design & Simulation

WEBENCH® Clock Architect - CDCM61004
 
Output Frequency
 
MHz
MHz
MHz
 
 

What is Clock Architect?

Models (1)

Title Category Type Size (KB) Date Views
CDCM61004 IBIS Model (Rev. B) IBIS Model ZIP 64 KB 24 Jan 2011 593 views

Design Kits & Evaluation Modules (1)

Name Part# Type
CDCM61004/CDCM61002/CDCM61001 Evaluation Module CDCM6100XEVM Evaluation Modules & Boards



Support & Community


TI E2E™ Community

TI E2E Community

As a member of my.TI you can join the TI E2E™ Community where you can ask questions, share ideas and collaborate with fellow engineers and TI experts

Contents are provided "AS IS" by the respective TI and Community contributors and do not constitute TI specifications. See Terms of Use.

Training & Events

Name Type Available During
Board Layout Guidelines for Centralized Clocking Architecture
Centralizing clocking helps reduce components and simplifies design. Learn topology best practices using layout guidelines.
On-Line Training   On Demand  
Hercules How to Tutorial: Force a Clock Monitor Failure
This video highlights the clock monitoring circuitry integrated into many Hercules Safety MCUs.
On-Line Training   On Demand  
TI Aerospace & Defence Tech Day
Thank you for attending the TI Aerospace & Defence Tech Day! Click here to download our HiRel EP presentation.
On-Line Training   On Demand  
TI Defence & Space Tech Day
Thank you for attending the TI Defence & Space Tech Day!
On-Line Training   On Demand  
Factory Automation Overview
In this webinar we present an overview of solutions addressing the industrial market including the PHYTER line.
On-Line Training   On Demand  
Click Here