Produktdetails

Resolution (Bits) 8 Sample rate (max) (ksps) 500 Number of input channels 1 Interface type Microwire (Serial I/O), SPI Architecture SAR Input type Single-ended Rating Catalog Reference mode Supply Input voltage range (max) (V) 5.25 Input voltage range (min) (V) 0 Features Small Size Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 1.6 Analog supply (min) (V) 2.7 Analog supply voltage (max) (V) 5.25 SNR (dB) 49.6 Digital supply (min) (V) 2.7 Digital supply (max) (V) 5.25
Resolution (Bits) 8 Sample rate (max) (ksps) 500 Number of input channels 1 Interface type Microwire (Serial I/O), SPI Architecture SAR Input type Single-ended Rating Catalog Reference mode Supply Input voltage range (max) (V) 5.25 Input voltage range (min) (V) 0 Features Small Size Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 1.6 Analog supply (min) (V) 2.7 Analog supply voltage (max) (V) 5.25 SNR (dB) 49.6 Digital supply (min) (V) 2.7 Digital supply (max) (V) 5.25
SOT-23 (DBV) 6 8.12 mm² 2.9 x 2.8 WSON (NGF) 6 5.5 mm² 2.5 x 2.2
  • Specified Over a Range of Sample Rates
  • 6-lead WSON and SOT-23 Packages
  • Variable Power Management
  • Single Power Supply with 2.7V – 5.25V Range
  • SPI™/QSPI™/MICROWIRE/DSP Compatible

Key Specifications

  • DNL: +0.06 / –0.045 LSB (Typ)
  • INL: +0.06 / –0.05 LSB (Typ)
  • SNR: 49.6 dB (Typ)
  • Power Consumption:
    • 3.6V Supply: 1.6 mW (Typ)
    • 5.25V Supply: 8.5 mW (Typ)
  • Specified Over a Range of Sample Rates
  • 6-lead WSON and SOT-23 Packages
  • Variable Power Management
  • Single Power Supply with 2.7V – 5.25V Range
  • SPI™/QSPI™/MICROWIRE/DSP Compatible

Key Specifications

  • DNL: +0.06 / –0.045 LSB (Typ)
  • INL: +0.06 / –0.05 LSB (Typ)
  • SNR: 49.6 dB (Typ)
  • Power Consumption:
    • 3.6V Supply: 1.6 mW (Typ)
    • 5.25V Supply: 8.5 mW (Typ)

The ADC081S051 is a low-power, single channel CMOS 8-bit analog-to-digital converter with a high-speed serial interface. Unlike the conventional practice of specifying performance at a single sample rate only, the ADC081S051 is fully specified over a sample rate range of 200 ksps to 500 ksps. The converter is based on a successive-approximation register architecture with an internal track-and-hold circuit.

The output serial data is straight binary, and is compatible with several standards, such as SPI™, QSPI™, MICROWIRE, and many common DSP serial interfaces.

The ADC081S051 operates with a single supply that can range from +2.7V to +5.25V. Normal power consumption using a +3.6V or +5.25V supply is 1.6 mW and 8.5 mW, respectively. The power-down feature reduces the power consumption to as low as 2.6 µW using a +5.25V supply.

The ADC081S051 is packaged in 6-lead WSON and SOT-23 packages. Operation over the industrial temperature range of −40°C to +85°C is ensured.

The ADC081S051 is a low-power, single channel CMOS 8-bit analog-to-digital converter with a high-speed serial interface. Unlike the conventional practice of specifying performance at a single sample rate only, the ADC081S051 is fully specified over a sample rate range of 200 ksps to 500 ksps. The converter is based on a successive-approximation register architecture with an internal track-and-hold circuit.

The output serial data is straight binary, and is compatible with several standards, such as SPI™, QSPI™, MICROWIRE, and many common DSP serial interfaces.

The ADC081S051 operates with a single supply that can range from +2.7V to +5.25V. Normal power consumption using a +3.6V or +5.25V supply is 1.6 mW and 8.5 mW, respectively. The power-down feature reduces the power consumption to as low as 2.6 µW using a +5.25V supply.

The ADC081S051 is packaged in 6-lead WSON and SOT-23 packages. Operation over the industrial temperature range of −40°C to +85°C is ensured.

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Typ Titel Datum
* Data sheet ADC081S051 Single Channel, 200 to 500 ksps, 8-Bit A/D Converter datasheet (Rev. F) 21 Jan 2014
E-book Best of Baker's Best: Precision Data Converters -- SAR ADCs 21 Mai 2015
EVM User's guide 50 ksps to 1 Msps, 12-, 10- and 8-Bit EVM Users Manual 20 Feb 2012
White paper Amp Closed-Loop Bndwidth Considerations in High Res ADC Apps 01 Okt 2006

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