Produktdetails

Function Clock divider, Clock multiplier, Clock synthesizer Number of outputs 6 Output frequency (max) (MHz) 167 Core supply voltage (V) 3.3 Output supply voltage (V) 3.3 Input type Differential, LVCMOS, XTAL Output type LVCMOS Operating temperature range (°C) 0 to 70 Features I2C, Integrated EEPROM, Multiplier or divider, Spread-spectrum clocking (SSC) Rating Catalog
Function Clock divider, Clock multiplier, Clock synthesizer Number of outputs 6 Output frequency (max) (MHz) 167 Core supply voltage (V) 3.3 Output supply voltage (V) 3.3 Input type Differential, LVCMOS, XTAL Output type LVCMOS Operating temperature range (°C) 0 to 70 Features I2C, Integrated EEPROM, Multiplier or divider, Spread-spectrum clocking (SSC) Rating Catalog
TSSOP (PW) 20 41.6 mm² 6.5 x 6.4
  • High Performance 3:6 PLL based Clock Synthesizer / Multiplier / Divider
  • User Programmable PLL Frequencies
  • EEPROM Programming Without the Need to Apply High Programming Voltage
  • Easy In-Circuit Programming via SMBus Data Interface
  • Wide PLL Divider Ratio Allows 0-ppm Output Clock Error
  • Generates Precise Video (27 MHz or 54 MHz) and Audio System Clocks from Multiple Sampling Frequencies (fS = 16, 22.05, 24, 32, 44.1, 48, 96 kHz)
  • Clock Inputs Accept a Crystal or a Single-Ended LVCMOS or a Differential Input Signal
  • Accepts Crystal Frequencies from 8 MHz up to 54 MHz
  • Accepts LVCMOS or Differential Input Frequencies up to 167 MHz
  • Two Programmable Control Inputs [S0/S1, A0/A1] for User Defined Control Signals
  • Six LVCMOS Outputs with Output Frequencies up to 167 MHz
  • LVCMOS Outputs can be Programmed for Complementary Signals
  • Free Selectable Output Frequency via Programmable Output Switching Matrix [6x6] Including 7-Bit Post-Divider for Each Output
  • PLL Loop Filter Components Integrated
  • Low Period Jitter (Typ 60 ps)
  • Features Spread Spectrum Clocking (SSC) for Lowering System EMI
  • Programmable Center Spread SSC Modulation (±0.1%, ±0.25%, and ±0.4%) with a Mean Phase Equal to the Phase of the Non-Modulated Frequency
  • Programmable Down Spread SSC Modulation (1%, 1.5%, 2%, and 3%)
  • Programmable Output Slew-Rate Control (SRC) for Lowering System EMI
  • 3.3-V Device Power Supply
  • Commercial Temperature Range 0°C to 70°C
  • Development and Programming Kit for Easy PLL Design and Programming
    (TI Pro-Clock™)
  • Packaged in 20-Pin TSSOP

Pro-Clock is a trademark of Texas Instruments.

  • High Performance 3:6 PLL based Clock Synthesizer / Multiplier / Divider
  • User Programmable PLL Frequencies
  • EEPROM Programming Without the Need to Apply High Programming Voltage
  • Easy In-Circuit Programming via SMBus Data Interface
  • Wide PLL Divider Ratio Allows 0-ppm Output Clock Error
  • Generates Precise Video (27 MHz or 54 MHz) and Audio System Clocks from Multiple Sampling Frequencies (fS = 16, 22.05, 24, 32, 44.1, 48, 96 kHz)
  • Clock Inputs Accept a Crystal or a Single-Ended LVCMOS or a Differential Input Signal
  • Accepts Crystal Frequencies from 8 MHz up to 54 MHz
  • Accepts LVCMOS or Differential Input Frequencies up to 167 MHz
  • Two Programmable Control Inputs [S0/S1, A0/A1] for User Defined Control Signals
  • Six LVCMOS Outputs with Output Frequencies up to 167 MHz
  • LVCMOS Outputs can be Programmed for Complementary Signals
  • Free Selectable Output Frequency via Programmable Output Switching Matrix [6x6] Including 7-Bit Post-Divider for Each Output
  • PLL Loop Filter Components Integrated
  • Low Period Jitter (Typ 60 ps)
  • Features Spread Spectrum Clocking (SSC) for Lowering System EMI
  • Programmable Center Spread SSC Modulation (±0.1%, ±0.25%, and ±0.4%) with a Mean Phase Equal to the Phase of the Non-Modulated Frequency
  • Programmable Down Spread SSC Modulation (1%, 1.5%, 2%, and 3%)
  • Programmable Output Slew-Rate Control (SRC) for Lowering System EMI
  • 3.3-V Device Power Supply
  • Commercial Temperature Range 0°C to 70°C
  • Development and Programming Kit for Easy PLL Design and Programming
    (TI Pro-Clock™)
  • Packaged in 20-Pin TSSOP

Pro-Clock is a trademark of Texas Instruments.

The CDCE906 is one of the smallest and powerful PLL synthesizer / multiplier / divider available today. Despite its small physical outlines, the CDCE906 is flexible. It has the capability to produce an almost independent output frequency from a given input frequency.

The input frequency can be derived from a LVCMOS, differential input clock, or a single crystal. The appropriate input waveform can be selected via the SMBus data interface controller.

To achieve an independent output frequency the reference divider M and the feedback divider N for each PLL can be set to values from 1 up to 511 for the M-Divider and from 1 up to 4095 for the N-Divider. The PLL-VCO (voltage controlled oscillator) frequency than is routed to the free programmable output switching matrix to any of the six outputs. The switching matrix includes an additional 7-bit post-divider (1-to-127) and an inverting logic for each output.

The deep M/N divider ratio allows the generation of zero ppm clocks from any reference input frequency (e.g., a 27 MHz).

The CDCE906 includes three PLLs of those one supports SSC (spread-spectrum clocking). PLL1, PLL2, and PLL3 are designed for frequencies up to 167 MHz and optimized for zero-ppm applications with wide divider factors.

PLL2 also supports center-spread and down-spread spectrum clocking (SSC). This is a common technique to reduce electro-magnetic interference. Also, the slew-rate controllable (SRC) output edges minimize EMI noise.

Based on the PLL frequency and the divider settings, the internal loop filter components will be automatically adjusted to achieve high stability and optimized jitter transfer characteristic of the PLL.

The device supports non-volatile EEPROM programming for easy-customized application. It is preprogrammed with a factory default configuration (see Figure 13) and can be reprogrammed to a different application configuration before it goes onto the PCB or reprogrammed by in-system programming. A different device setting is programmed via the serial SMBus interface.

Two free programmable inputs, S0 and S1, can be used to control for each application the most demanding logic control settings (outputs disable to low, outputs 3-state, power down, PLL bypass, etc).

The CDCE906 has three power supply pins, VCC, VCCOUT1 and VCCOUT2. VCC is the power supply for the device. It operates from a single 3.3-V supply voltage. VCCOUT1 and VCCOUT2 are the power supply pins for the outputs. VCCOUT1 supplies the outputs Y0 and Y1 and VCCOUT2 supplies the outputs Y2, Y3, Y4, and Y5. Both outputs supplies can be 2.3 V to 3.6 V. At output voltages lower than 3.3 V, the output drive current is limited.

The CDCE906 is characterized for operation from 0°C to 70°C.

The CDCE906 is one of the smallest and powerful PLL synthesizer / multiplier / divider available today. Despite its small physical outlines, the CDCE906 is flexible. It has the capability to produce an almost independent output frequency from a given input frequency.

The input frequency can be derived from a LVCMOS, differential input clock, or a single crystal. The appropriate input waveform can be selected via the SMBus data interface controller.

To achieve an independent output frequency the reference divider M and the feedback divider N for each PLL can be set to values from 1 up to 511 for the M-Divider and from 1 up to 4095 for the N-Divider. The PLL-VCO (voltage controlled oscillator) frequency than is routed to the free programmable output switching matrix to any of the six outputs. The switching matrix includes an additional 7-bit post-divider (1-to-127) and an inverting logic for each output.

The deep M/N divider ratio allows the generation of zero ppm clocks from any reference input frequency (e.g., a 27 MHz).

The CDCE906 includes three PLLs of those one supports SSC (spread-spectrum clocking). PLL1, PLL2, and PLL3 are designed for frequencies up to 167 MHz and optimized for zero-ppm applications with wide divider factors.

PLL2 also supports center-spread and down-spread spectrum clocking (SSC). This is a common technique to reduce electro-magnetic interference. Also, the slew-rate controllable (SRC) output edges minimize EMI noise.

Based on the PLL frequency and the divider settings, the internal loop filter components will be automatically adjusted to achieve high stability and optimized jitter transfer characteristic of the PLL.

The device supports non-volatile EEPROM programming for easy-customized application. It is preprogrammed with a factory default configuration (see Figure 13) and can be reprogrammed to a different application configuration before it goes onto the PCB or reprogrammed by in-system programming. A different device setting is programmed via the serial SMBus interface.

Two free programmable inputs, S0 and S1, can be used to control for each application the most demanding logic control settings (outputs disable to low, outputs 3-state, power down, PLL bypass, etc).

The CDCE906 has three power supply pins, VCC, VCCOUT1 and VCCOUT2. VCC is the power supply for the device. It operates from a single 3.3-V supply voltage. VCCOUT1 and VCCOUT2 are the power supply pins for the outputs. VCCOUT1 supplies the outputs Y0 and Y1 and VCCOUT2 supplies the outputs Y2, Y3, Y4, and Y5. Both outputs supplies can be 2.3 V to 3.6 V. At output voltages lower than 3.3 V, the output drive current is limited.

The CDCE906 is characterized for operation from 0°C to 70°C.

Herunterladen Video mit Transkript ansehen Video

Technische Dokumentation

star =Von TI ausgewählte Top-Empfehlungen für dieses Produkt
Keine Ergebnisse gefunden. Bitte geben Sie einen anderen Begriff ein und versuchen Sie es erneut.
Alle anzeigen 10
Typ Titel Datum
* Data sheet Programmable 3-PLL Clock Synthesizer / Multiplier/Divider datasheet (Rev. H) 11 Dez 2007
Application note High Speed Layout Guidelines (Rev. A) 08 Aug 2017
User guide CDCE(L)9XX & CDCEx06 Programming Evaluation Module Manual (Rev. A) 22 Nov 2010
Application note Troubleshooting I2C Bus Protocol 19 Okt 2009
User guide CDCE(L)9XX & CDCEx06 Programming Evaluation Module Manual 09 Dez 2008
Application note CDCx706/x906 Termination and Signal Integrity Guidelines (Rev. A) 28 Nov 2007
EVM User's guide CDCE906/CDCE706 Programming EVM (Rev. B) 14 Aug 2007
User guide CDCE906/CDCE706 Performance EVM (Rev. B) 17 Apr 2007
Application note Clock Recommendations for the DM643x EVM 29 Nov 2006
Application note Recommended Terminations for the Differential Inputs of CDCE906/CDCE706 10 Aug 2006

Design und Entwicklung

Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.

Evaluierungsplatine

CDCE906-706PERFEVM — CDCE906- und CDCE706-EVM

Das Evaluierungsmodul CDCE906-706PERF ermöglicht die Verifizierung der Funktionalität und Leistung der Bausteine CDCE906 und CDCE706 mit den Optionen für Quarz-Differential und LVCMOS-Eingängen. Die sechs Ausgänge können direkt über SMA-Kabel mit dem Oszilloskop verbunden werden.
Benutzerhandbuch: PDF
Evaluierungsplatine

CDCE906-706PROGEVM — CDCE906 und CDCE706 programmierbares EVM

Benutzerhandbuch: PDF
Anwendungssoftware und Frameworks

SCAC097 Executable File Without LabVIEW 8.2 Run Time Engine

Unterstützte Produkte und Hardware

Unterstützte Produkte und Hardware

Produkte
Taktgeneratoren
CDCE706 300-MHz, LVCMOS, programmierbarer 3-PLL-Taktsynthesizer/Multiplikator/Teiler CDCE906 167-MHz, LVCMOS, programmierbarer 3-PLL-Taktsynthesizer/Multiplikator/Teiler CDCE913 Programmierbarer VCXO-Taktsynthesizer mit 1 PLL sowie mit LVCMOS-Ausgängen für 2,5 oder 3,3 Volt CDCE925 Programmierbarer VCXO-Taktsynthesizer mit 2 PLL sowie mit LVCMOS-Ausgängen für 2,5 oder 3,3 Volt CDCE937 Programmierbarer VCXO-Taktsynthesizer mit 3 PLL sowie mit LVCMOS-Ausgängen für 2,5 oder 3,3 Volt CDCE949 Programmierbarer VCXO-Taktsynthesizer mit 4 PLL sowie mit LVCMOS-Ausgängen für 2,5 oder 3,3 Volt
Support-Software

CLOCKPRO ClockPro Software

TI's ClockPro software allows users to program/configure the following devices in a friendly GUI interface:

  • CDCE949
  • CDCE937
  • CDCE925
  • CDCE913
  • CDCE906
  • CDCE706
  • CDCEL949
  • CDCEL937
  • CDCEL925
  • CDCEL913

It is intended to be used with the evaluation modules of the above devices.

Unterstützte Produkte und Hardware

Unterstützte Produkte und Hardware

Produkte
Taktgeneratoren
CDCE706 300-MHz, LVCMOS, programmierbarer 3-PLL-Taktsynthesizer/Multiplikator/Teiler CDCE906 167-MHz, LVCMOS, programmierbarer 3-PLL-Taktsynthesizer/Multiplikator/Teiler CDCE913 Programmierbarer VCXO-Taktsynthesizer mit 1 PLL sowie mit LVCMOS-Ausgängen für 2,5 oder 3,3 Volt CDCE925 Programmierbarer VCXO-Taktsynthesizer mit 2 PLL sowie mit LVCMOS-Ausgängen für 2,5 oder 3,3 Volt CDCE937 Programmierbarer VCXO-Taktsynthesizer mit 3 PLL sowie mit LVCMOS-Ausgängen für 2,5 oder 3,3 Volt CDCE949 Programmierbarer VCXO-Taktsynthesizer mit 4 PLL sowie mit LVCMOS-Ausgängen für 2,5 oder 3,3 Volt CDCEL913 Programmierbarer 1-PLL VCXO-Taktsynthesizer mit 1,8-V-LVCMOS-Ausgängen CDCEL925 Programmierbarer 2-PLL VCXO-Taktsynthesizer mit 1,8-V-LVCMOS-Ausgängen CDCEL937 Programmierbarer 3-PLL VCXO-Taktsynthesizer mit 1,8-V-LVCMOS-Ausgängen CDCEL949 Programmierbarer 4-PLL-VCXO-Taktsynthesizer mit 1,8-V-LVCMOS-Ausgängen
Hardware-Entwicklung
Evaluierungsplatine
CDCE906-706PROGEVM CDCE906 und CDCE706 programmierbares EVM CDCE913PERF-EVM CDCE913-Leistungsdichten-Evaluierungsmodul CDCE925PERF-EVM CDCE925-Leistungsdichten-Evaluierungsmodul CDCE949PERF-EVM CDCE949-Leistungsdichten-Evaluierungsmodul CDCEL913PERF-EVM CDCEL913-Leistungsdichten-Evaluierungsmodul CDCEL925PERF-EVM CDCEL925-Leistungsdichten-Evaluierungsmodul CDCEL949PERF-EVM CDCEL949-Leistungsdichten-Evaluierungsmodul CDCEL9XXPROGEVM EEPROM-Programmierkarte der CDCE(L)949-Familie
Software
Software-Programmiertool
CLOCKPRO ClockPro™-Programmiersoftware
Support-Software

SCAC073 TI-Pro-Clock Programming Software

Unterstützte Produkte und Hardware

Unterstützte Produkte und Hardware

Produkte
Taktgeneratoren
CDC706 200 MHz, LVCMOS, benutzerdefiniert programmierter 3-PLL-Taktsynthesizer, Multiplikator und Teiler CDC906 167 MHz, LVCMOS, benutzerdefiniert programmierter 3-PLL-Taktsynthesizer, Multiplikator und Teiler CDCE706 300-MHz, LVCMOS, programmierbarer 3-PLL-Taktsynthesizer/Multiplikator/Teiler CDCE906 167-MHz, LVCMOS, programmierbarer 3-PLL-Taktsynthesizer/Multiplikator/Teiler CDCE913 Programmierbarer VCXO-Taktsynthesizer mit 1 PLL sowie mit LVCMOS-Ausgängen für 2,5 oder 3,3 Volt CDCE925 Programmierbarer VCXO-Taktsynthesizer mit 2 PLL sowie mit LVCMOS-Ausgängen für 2,5 oder 3,3 Volt CDCE937 Programmierbarer VCXO-Taktsynthesizer mit 3 PLL sowie mit LVCMOS-Ausgängen für 2,5 oder 3,3 Volt CDCE949 Programmierbarer VCXO-Taktsynthesizer mit 4 PLL sowie mit LVCMOS-Ausgängen für 2,5 oder 3,3 Volt CDCEL913 Programmierbarer 1-PLL VCXO-Taktsynthesizer mit 1,8-V-LVCMOS-Ausgängen CDCEL925 Programmierbarer 2-PLL VCXO-Taktsynthesizer mit 1,8-V-LVCMOS-Ausgängen CDCEL937 Programmierbarer 3-PLL VCXO-Taktsynthesizer mit 1,8-V-LVCMOS-Ausgängen CDCEL949 Programmierbarer 4-PLL-VCXO-Taktsynthesizer mit 1,8-V-LVCMOS-Ausgängen
Simulationsmodell

CDCE906 IBIS Model (Rev. A)

SCAC071A.ZIP (119 KB) - IBIS Model
Simulationstool

PSPICE-FOR-TI — PSpice® für TI Design-und Simulationstool

PSpice® für TI ist eine Design- und Simulationsumgebung, welche Sie dabei unterstützt, die Funktionalität analoger Schaltungen zu evaluieren. Diese voll ausgestattete Design- und Simulationssuite verwendet eine analoge Analyse-Engine von Cadence®. PSpice für TI ist kostenlos erhältlich und (...)
Referenzdesigns

TIDA-00080 — Referenzdesign für isoliertes Delta-Sigma-Modulator-basiertes AC/DC-Spannungs- und Strommessmodul

This isolated shunt based current measurement unit enables high accuracy current measurement without the use of Current Transformers (CT). The isolation is achieved through the use of AMC1304 that incorporates both high voltage isolation as well as the Delta-Sigma Modulator. This solution (...)
Design guide: PDF
Schaltplan: PDF
Referenzdesigns

TIDA-00171 — Referenzdesign für isolierte Messung von Strom-Shunt und Spannung zur Verwendung in Motorantrieben

This evaluation kit and reference design implements the AMC130x reinforced isolated delta-sigma modulators along with integrated Sinc filters in the C2000™ TMS320F28377D Delfino™ microcontroller. The design provides an ability to evaluate the  performance of these measurements: three motor (...)
Benutzerhandbuch: PDF
Schaltplan: PDF
Gehäuse Pins Herunterladen
TSSOP (PW) 20 Optionen anzeigen

Bestellen & Qualität

Beinhaltete Information:
  • RoHS
  • REACH
  • Bausteinkennzeichnung
  • Blei-Finish/Ball-Material
  • MSL-Rating / Spitzenrückfluss
  • MTBF-/FIT-Schätzungen
  • Materialinhalt
  • Qualifikationszusammenfassung
  • Kontinuierliches Zuverlässigkeitsmonitoring
Beinhaltete Information:
  • Werksstandort
  • Montagestandort

Empfohlene Produkte können Parameter, Evaluierungsmodule oder Referenzdesigns zu diesem TI-Produkt beinhalten.

Support und Schulungen

TI E2E™-Foren mit technischem Support von TI-Ingenieuren

Inhalte werden ohne Gewähr von TI und der Community bereitgestellt. Sie stellen keine Spezifikationen von TI dar. Siehe Nutzungsbedingungen.

Bei Fragen zu den Themen Qualität, Gehäuse oder Bestellung von TI-Produkten siehe TI-Support. ​​​​​​​​​​​​​​

Videos