NEU

SN54SC2T74-SEP

Name: SN54SC2T74-SEP
Brand: TI
SKU: SN54SC2T74-SEP
Price: 100 USD

AKTIV

Strahlungstolerante Dual-D-Typ-Flipflops mit klarem, voreingestelltem und integrierter Pegelverschie

Jetzt bestellen

Datenblatt

document-pdfAcrobat SN54SC2T74-SEPRadiation Tolerant, Dual D-Type Flip-Flop With Integrated Translation datasheet (Englisch) PDF | HTML

SN54SC2T74-SEP

AKTIV

Datenblatt

Jetzt bestellen

Produktdetails

Number of channels

2

Technology family

SCxT

Supply voltage (min) (V)

1.2

Supply voltage (max) (V)

5.5

Input type

TTL-Compatible CMOS

Output type

Push-Pull

Features

Balanced outputs, Over-voltage tolerant inputs, Voltage translation

Operating temperature range (°C)

-55 to 125

Rating

Space

Number of channels

2

Technology family

SCxT

Supply voltage (min) (V)

1.2

Supply voltage (max) (V)

5.5

Input type

TTL-Compatible CMOS

Output type

Push-Pull

Features

Balanced outputs, Over-voltage tolerant inputs, Voltage translation

Operating temperature range (°C)

-55 to 125

Rating

Space

TSSOP (PW)

14

32 mm² 5 x 6.4

Vendor item drawing available, VID V62/23632-01XE
Total ionizing dose characterized at 30 krad (Si)
- Total ionizing dose radiation lot acceptance testing (TID RLAT) for every wafer lot to 30 krad (Si)
Single-event effects (SEE) characterized:
- Single event latch-up (SEL) immune to linear energy transfer (LET) = 43 MeV-cm2 /mg
- Single event transient (SET) characterized to 43 MeV-cm2 /mg
Wide operating range of 1.2 V to 5.5 V
Single-supply translating gates at 5/3.3/2.5/1.8/1.2 V V CC
- TTL compatible inputs:
  - Up translation:
    - 1.8-V – Inputs from 1.2 V
    - 2.5-V – Inputs from 1.8 V
    - 3.3-V – Inputs from 1.8 V, 2.5 V
    - 5.0-V – Inputs from 2.5 V, 3.3 V
  - Down translation:
    - 1.2-V – Inputs from 1.8 V, 2.5 V, 3.3 V, 5.0 V
    - 1.8-V – Inputs from 2.5 V, 3.3 V, 5.0 V
    - 2.5-V – Inputs from 3.3 V, 5.0 V
    - 3.3-V – Inputs from 5.0 V
5.5 V tolerant input pins
Output drive up to 25 mA AT 5-V
Latch-up performance exceeds 250 mA per JESD 17
Space enhanced plastic (SEP)
- Controlled baseline
- Gold bondwire
- NiPdAu lead finish
- One assembly and test site
- One fabrication site
- Military (–55°C to 125°C) temperature range
- Extended product life cycle
- Product traceability
- Meets NASAs ASTM E595 outgassing specification

Vendor item drawing available, VID V62/23632-01XE
Total ionizing dose characterized at 30 krad (Si)
- Total ionizing dose radiation lot acceptance testing (TID RLAT) for every wafer lot to 30 krad (Si)
Single-event effects (SEE) characterized:
- Single event latch-up (SEL) immune to linear energy transfer (LET) = 43 MeV-cm2 /mg
- Single event transient (SET) characterized to 43 MeV-cm2 /mg
Wide operating range of 1.2 V to 5.5 V
Single-supply translating gates at 5/3.3/2.5/1.8/1.2 V V CC
- TTL compatible inputs:
  - Up translation:
    - 1.8-V – Inputs from 1.2 V
    - 2.5-V – Inputs from 1.8 V
    - 3.3-V – Inputs from 1.8 V, 2.5 V
    - 5.0-V – Inputs from 2.5 V, 3.3 V
  - Down translation:
    - 1.2-V – Inputs from 1.8 V, 2.5 V, 3.3 V, 5.0 V
    - 1.8-V – Inputs from 2.5 V, 3.3 V, 5.0 V
    - 2.5-V – Inputs from 3.3 V, 5.0 V
    - 3.3-V – Inputs from 5.0 V
5.5 V tolerant input pins
Output drive up to 25 mA AT 5-V
Latch-up performance exceeds 250 mA per JESD 17
Space enhanced plastic (SEP)
- Controlled baseline
- Gold bondwire
- NiPdAu lead finish
- One assembly and test site
- One fabrication site
- Military (–55°C to 125°C) temperature range
- Extended product life cycle
- Product traceability
- Meets NASAs ASTM E595 outgassing specification

The SN54SC2T74-SEP contains two independent D-type positive-edge-triggered flip-flops. A low level at the preset ( PRE) input sets the output high. A low level at the clear ( CLR) input resets the output low. Preset and clear functions are asynchronous and not dependent on the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs (Q, Q) on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the input clock (CLK) signal. Following the hold-time interval, data at the data (D) input can be changed without affecting the levels at the outputs (Q, Q). The output level is referenced to the supply voltage (V CC) and supports 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels.

The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example, 1.2 V input to 1.8 V output or 1.8 V input to 3.3 V output). In addition, the 5-V tolerant input pins enable down translation (for example, 3.3 V to 2.5 V output).

The SN54SC2T74-SEP contains two independent D-type positive-edge-triggered flip-flops. A low level at the preset ( PRE) input sets the output high. A low level at the clear ( CLR) input resets the output low. Preset and clear functions are asynchronous and not dependent on the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs (Q, Q) on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the input clock (CLK) signal. Following the hold-time interval, data at the data (D) input can be changed without affecting the levels at the outputs (Q, Q). The output level is referenced to the supply voltage (V CC) and supports 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels.

The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example, 1.2 V input to 1.8 V output or 1.8 V input to 3.3 V output). In addition, the 5-V tolerant input pins enable down translation (for example, 3.3 V to 2.5 V output).

open-in-new

Andere D-Typ-Flipflops suchen

Herunterladen Video mit Transkript ansehen Video

Technische Dokumentation

star

=Von TI ausgewählte Top-Empfehlungen für dieses Produkt

Keine Ergebnisse gefunden. Bitte geben Sie einen anderen Begriff ein und versuchen Sie es erneut.

Alle anzeigen 4

	Typ	Titel		Datum
*	Data sheet	SN54SC2T74-SEPRadiation Tolerant, Dual D-Type Flip-Flop With Integrated Translation datasheet	PDF \| HTML	15 Nov 2023
*	Radiation & reliability report	SN54SC2T74-SEP Single Event Effects Report	PDF \| HTML	04 Apr 2024
*	Radiation & reliability report	SN54SC2T74-SEP Total Ionizing Dose (TID) Report	PDF \| HTML	01 Dez 2023
*	Radiation & reliability report	SN54SC2T74-SEP Production Flow and Reliability Report	PDF \| HTML	03 Nov 2023

Design und Entwicklung

Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.

Evaluierungsplatine

14-24-LOGIC-EVM — Generisches Logikprodukt-Evaluierungsmodul für 14-polige bis 24-polige D-, DB-, DGV-, DW-, DYY-, NS-

Das 14-24-LOGIC-EVM-Evaluierungsmodul (EVM) ist für die Unterstützung aller Logikgeräte konzipiert, die sich in einem 14-Pin- bis 24-Pin-D-, DW-, DB-, NS-, PW-, DYY- oder DGV-Gehäuse befinden.

Benutzerhandbuch: PDF | HTML

Nicht verfügbar auf TI.com

Evaluierungsplatine

14-24-NL-LOGIC-EVM — Generisches Logikprodukt-Evaluierungsmodul für 14- bis 24-polige bleifreie Gehäuse

14-24-NL-LOGIC-EVM ist ein flexibles Evaluierungsmodul (EVM), das alle Logik- oder Übersetzungsbausteine mit einem 14- bis 24-poligen BQA-, BQB-, RGY-, RSV-, RJW- oder RHL-Gehäuse unterstützt.

Benutzerhandbuch: PDF | HTML

Nicht verfügbar auf TI.com

Gehäuse	Pins	Herunterladen
TSSOP (PW)	14	Optionen anzeigen

Es gelten die allgemeinen Geschäftsbedingungen von TI für Evaluierungsartikel.

SN54SC2T74-SEP

Strahlungstolerante Dual-D-Typ-Flipflops mit klarem, voreingestelltem und integrierter Pegelverschie

SN54SC2T74-SEP

Produktdetails

Technische Dokumentation

Design und Entwicklung

14-24-LOGIC-EVM — Generisches Logikprodukt-Evaluierungsmodul für 14-polige bis 24-polige D-, DB-, DGV-, DW-, DYY-, NS-

14-24-NL-LOGIC-EVM — Generisches Logikprodukt-Evaluierungsmodul für 14- bis 24-polige bleifreie Gehäuse

Bestellen & Qualität

Support und Schulungen

TI E2E™-Foren mit technischem Support von TI-Ingenieuren

Videoreihe

Videos