Startseite Schnittstelle UARTs

TL16C450

AKTIV

Einzel-UART ohne FIFO

Produktdetails

Number of channels 1 FIFO (Byte) 0 Programmable FIFO trigger levels No CPU interface X86 Baud rate at Vcc = 5 V & with 16x sampling (max) (MBps) 0.256 Operating voltage (V) 5 Auto RTS/CTS Yes Rating Catalog Operating temperature range (°C) 0 to 70
Number of channels 1 FIFO (Byte) 0 Programmable FIFO trigger levels No CPU interface X86 Baud rate at Vcc = 5 V & with 16x sampling (max) (MBps) 0.256 Operating voltage (V) 5 Auto RTS/CTS Yes Rating Catalog Operating temperature range (°C) 0 to 70
PLCC (FN) 44 307.3009 mm² 17.53 x 17.53
  • Programmable Baud Rate Generator Allows Division of Any Input Reference Clock by 1 to (216 -1) and Generates an Internal 16× Clock
  • Full Double Buffering Eliminates the Need for Precise Synchronization
  • Standard Asynchronous Communication Bits (Start, Stop, and Parity) Added or Deleted to or From the Serial Data Stream
  • Independent Receiver Clock Input
  • Transmit, Receive, Line Status, and Data Set Interrupts Independently Controlled
  • Fully Programmable Serial Interface Characteristics:
    • 5-, 6-, 7-, or 8-Bit Characters
    • Even-, Odd-, or No-Parity Bit Generation and Detection
    • 1-, 1 1/2-, or 2-Stop Bit Generation
    • Baud Generation (dc to 256 Kbit/s)
  • False Start Bit Detection
  • Complete Status Reporting Capabilities
  • 3-State TTL Drive Capabilities for Bidirectional Data Bus and Control Bus
  • Line Break Generation and Detection
  • Internal Diagnostic Capabilities:
    • Loopback Controls for Communications Link Fault Isolation
    • Break, Parity, Overrun, Framing Error Simulation
  • Fully Prioritized Interrupt System Controls
  • Modem Control Functions (CTS\, RTS\, DSR\, DTR\, RI\, and DCD\)
  • Easily Interfaces to Most Popular Microprocessors
  • Faster Plug-In Replacement for National Semiconductor NS16C450

  • Programmable Baud Rate Generator Allows Division of Any Input Reference Clock by 1 to (216 -1) and Generates an Internal 16× Clock
  • Full Double Buffering Eliminates the Need for Precise Synchronization
  • Standard Asynchronous Communication Bits (Start, Stop, and Parity) Added or Deleted to or From the Serial Data Stream
  • Independent Receiver Clock Input
  • Transmit, Receive, Line Status, and Data Set Interrupts Independently Controlled
  • Fully Programmable Serial Interface Characteristics:
    • 5-, 6-, 7-, or 8-Bit Characters
    • Even-, Odd-, or No-Parity Bit Generation and Detection
    • 1-, 1 1/2-, or 2-Stop Bit Generation
    • Baud Generation (dc to 256 Kbit/s)
  • False Start Bit Detection
  • Complete Status Reporting Capabilities
  • 3-State TTL Drive Capabilities for Bidirectional Data Bus and Control Bus
  • Line Break Generation and Detection
  • Internal Diagnostic Capabilities:
    • Loopback Controls for Communications Link Fault Isolation
    • Break, Parity, Overrun, Framing Error Simulation
  • Fully Prioritized Interrupt System Controls
  • Modem Control Functions (CTS\, RTS\, DSR\, DTR\, RI\, and DCD\)
  • Easily Interfaces to Most Popular Microprocessors
  • Faster Plug-In Replacement for National Semiconductor NS16C450

The TL16C450 is a CMOS version of an asynchronous communications element (ACE). It typically functions in a microcomputer system as a serial input/output interface.

The TL16C450 performs serial-to-parallel conversion on data received from a peripheral device or modem and parallel-to-serial conversion on data received from its CPU. The CPU can read and report on the status of the ACE at any point in the ACE's operation. Reported status information includes the type of transfer operation in progress, the status of the operation, and any error conditions encountered.

The TL16C450 ACE includes a programmable, on-board, baud rate generator. This generator is capable of dividing a reference clock input by divisors from 1 to (216 -1) and producing a 16× clock for driving the internal transmitter logic. Provisions are included to use this 16× clock to drive the receiver logic. Also included in the ACE is a complete modem control capability and a processor interrupt system that may be software tailored to the user's requirements to minimize the computing required to handle the communications link.

The TL16C450 is a CMOS version of an asynchronous communications element (ACE). It typically functions in a microcomputer system as a serial input/output interface.

The TL16C450 performs serial-to-parallel conversion on data received from a peripheral device or modem and parallel-to-serial conversion on data received from its CPU. The CPU can read and report on the status of the ACE at any point in the ACE's operation. Reported status information includes the type of transfer operation in progress, the status of the operation, and any error conditions encountered.

The TL16C450 ACE includes a programmable, on-board, baud rate generator. This generator is capable of dividing a reference clock input by divisors from 1 to (216 -1) and producing a 16× clock for driving the internal transmitter logic. Provisions are included to use this 16× clock to drive the receiver logic. Also included in the ACE is a complete modem control capability and a processor interrupt system that may be software tailored to the user's requirements to minimize the computing required to handle the communications link.

Herunterladen Video mit Transkript ansehen Video

Technische Dokumentation

star =Von TI ausgewählte Top-Empfehlungen für dieses Produkt
Keine Ergebnisse gefunden. Bitte geben Sie einen anderen Begriff ein und versuchen Sie es erneut.
Alle anzeigen 2
Typ Titel Datum
* Data sheet Asynchronous Communications Element datasheet (Rev. C) 19 Jan 2006
Product overview UART Quick Reference Card (Rev. D) 09 Apr 2008

Design und Entwicklung

Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.

Simulationstool

PSPICE-FOR-TI — PSpice® für TI Design-und Simulationstool

PSpice® für TI ist eine Design- und Simulationsumgebung, welche Sie dabei unterstützt, die Funktionalität analoger Schaltungen zu evaluieren. Diese voll ausgestattete Design- und Simulationssuite verwendet eine analoge Analyse-Engine von Cadence®. PSpice für TI ist kostenlos erhältlich und (...)
Simulationstool

TINA-TI — SPICE-basiertes analoges Simulationsprogramm

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Benutzerhandbuch: PDF
Gehäuse Pins Herunterladen
PLCC (FN) 44 Optionen anzeigen

Bestellen & Qualität

Beinhaltete Information:
  • RoHS
  • REACH
  • Bausteinkennzeichnung
  • Blei-Finish/Ball-Material
  • MSL-Rating / Spitzenrückfluss
  • MTBF-/FIT-Schätzungen
  • Materialinhalt
  • Qualifikationszusammenfassung
  • Kontinuierliches Zuverlässigkeitsmonitoring
Beinhaltete Information:
  • Werksstandort
  • Montagestandort

Support und Schulungen

TI E2E™-Foren mit technischem Support von TI-Ingenieuren

Inhalte werden ohne Gewähr von TI und der Community bereitgestellt. Sie stellen keine Spezifikationen von TI dar. Siehe Nutzungsbedingungen.

Bei Fragen zu den Themen Qualität, Gehäuse oder Bestellung von TI-Produkten siehe TI-Support. ​​​​​​​​​​​​​​

Videos