홈 전원 관리 선형 및 저손실(LDO) 레귤레이터
홈
전원 관리
선형 및 저손실(LDO) 레귤레이터

TPS74301

활성

PG를 지원하는 1.5A, 낮은 입력 전압(0.8V), 고정밀, 조정 가능한 초저 손실 전압 레귤레이터

지금 주문
데이터 시트

TPS74301

활성
데이터 시트 지금 주문

제품 상세 정보

Output options Adjustable Output, Tracking Output Iout (max) (A) 1.5 Vin (max) (V) 5.5 Vin (min) (V) 0.8 Vout (max) (V) 3.6 Vout (min) (V) 0.8 Noise (µVrms) 20 Iq (typ) (mA) 3 Thermal resistance θJA (°C/W) 20 Rating Catalog Load capacitance (min) (µF) 0 Regulated outputs (#) 1 Features Enable, Power good Accuracy (%) 1 PSRR at 100 KHz (dB) 45 Dropout voltage (Vdo) (typ) (mV) 55 Operating temperature range (°C) -40 to 85
Output options Adjustable Output, Tracking Output Iout (max) (A) 1.5 Vin (max) (V) 5.5 Vin (min) (V) 0.8 Vout (max) (V) 3.6 Vout (min) (V) 0.8 Noise (µVrms) 20 Iq (typ) (mA) 3 Thermal resistance θJA (°C/W) 20 Rating Catalog Load capacitance (min) (µF) 0 Regulated outputs (#) 1 Features Enable, Power good Accuracy (%) 1 PSRR at 100 KHz (dB) 45 Dropout voltage (Vdo) (typ) (mV) 55 Operating temperature range (°C) -40 to 85
TO-263 (KTW) 7 153.924 mm² 10.1 x 15.24 VQFN (RGW) 20 25 mm² 5 x 5
  • Track Pin Allows for Flexible Power-Up Sequencing
  • 1% Accuracy Over Line, Load, and Temperature
  • Supports Input Voltages as Low as 0.9V with External Bias Supply
  • Adjustable Output (0.8V to 3.6V)
  • Fixed Output (0.9V to 3.6V)
  • Ultra-Low Dropout: 55mV at 1.5A (typ)
  • Stable with Any or No Output Capacitor
  • Excellent Transient Response
  • Available in 5mm × 5mm × 1mm QFN and DDPAK-7 Packages
  • Open-Drain Power-Good (5 × 5 QFN)
  • Active High Enable
  • APPLICATIONS
    • FPGA Applications
    • DSP Core and I/O Voltages
    • Post-Regulation Applications
    • Applications with Special Start-Up Time or Sequencing Requirements

All other trademarks are the property of their respective owners
  • Track Pin Allows for Flexible Power-Up Sequencing
  • 1% Accuracy Over Line, Load, and Temperature
  • Supports Input Voltages as Low as 0.9V with External Bias Supply
  • Adjustable Output (0.8V to 3.6V)
  • Fixed Output (0.9V to 3.6V)
  • Ultra-Low Dropout: 55mV at 1.5A (typ)
  • Stable with Any or No Output Capacitor
  • Excellent Transient Response
  • Available in 5mm × 5mm × 1mm QFN and DDPAK-7 Packages
  • Open-Drain Power-Good (5 × 5 QFN)
  • Active High Enable
  • APPLICATIONS
    • FPGA Applications
    • DSP Core and I/O Voltages
    • Post-Regulation Applications
    • Applications with Special Start-Up Time or Sequencing Requirements

All other trademarks are the property of their respective owners

The TPS743xx low-dropout (LDO) linear regulators provide an easy-to-use robust power management solution for a wide variety of applications. The TRACK pin allows the output to track an external supply. This feature is useful in minimizing the stress on ESD structures that are present between the CORE and I/O power pins of many processors. The enable input and power-good output allow easy sequencing with external regulators. This complete flexibility allows the user to configure a solution that meets the sequencing requirements of FPGAs, DSPs, and other applications with special start-up requirements.

A precision reference and error amplifier deliver 1% accuracy over load, line, temperature, and process. Each LDO is stable with low-cost ceramic output capacitors and the family is fully specified from –40°C to +125°C. The TPS743xx is offered in a small (5mm × 5mm) QFN package, yielding a highly compact total solution size. For applications that require additional power dissipation, the DDPAK (KTW) package is also available.

The TPS743xx low-dropout (LDO) linear regulators provide an easy-to-use robust power management solution for a wide variety of applications. The TRACK pin allows the output to track an external supply. This feature is useful in minimizing the stress on ESD structures that are present between the CORE and I/O power pins of many processors. The enable input and power-good output allow easy sequencing with external regulators. This complete flexibility allows the user to configure a solution that meets the sequencing requirements of FPGAs, DSPs, and other applications with special start-up requirements.

A precision reference and error amplifier deliver 1% accuracy over load, line, temperature, and process. Each LDO is stable with low-cost ceramic output capacitors and the family is fully specified from –40°C to +125°C. The TPS743xx is offered in a small (5mm × 5mm) QFN package, yielding a highly compact total solution size. For applications that require additional power dissipation, the DDPAK (KTW) package is also available.
filter 기타 선형 및 저손실(LDO) 레귤레이터 찾기
다운로드 스크립트와 함께 비디오 보기 동영상

관심 가지실만한 유사 제품

open-in-new 대안 비교
비교 대상 장치와 유사한 기능
TPS7A8300 활성 높은 정확도의 전력 양호를 지원하는 2A, 낮은 VIN, 낮은 2A, 낮은 VIN, 저잡음, 초저손실 전압 레귤레이터 TPS7A8300 is a next-generation, low-noise, 2-A LDO.
TPS7A83A 활성 전원 코드가 포함된 2A, 낮은 VIN(1.1V), 저잡음, 고정밀, 초저손실 전압 레귤레이터 2-A LDO with lower-noise (4.4uVrms), low dropout (200mV) and improved accuracy (0.75%)
TPS7A92 활성 높은 정확도를 갖춘 2A, 저잡음, 높은 PSRR, 조정 가능한 초저손실 전압 레귤레이터 2-A LDO with lower noise (4.7uVrms) LDO in small package (2.5x2.5mm)

기술 자료

star =TI에서 선정한 이 제품의 인기 문서
검색된 결과가 없습니다. 검색어를 지우고 다시 시도하십시오.
10개 모두 보기
유형 직함 날짜
* Data sheet 1.5A Ultra-LDO with Programmable Sequencing datasheet (Rev. K) 2010/08/10
Application note LDO Noise Demystified (Rev. B) PDF | HTML 2020/08/18
Application note A Topical Index of TI LDO Application Notes (Rev. F) 2019/06/27
Selection guide Low Dropout Regulators Quick Reference Guide (Rev. P) 2018/03/21
Application note LDO PSRR Measurement Simplified (Rev. A) PDF | HTML 2017/08/09
Application note Using New Thermal Metrics 2009/12/15
Analog Design Journal Q3 2007 Issue Analog Applications Journal 2007/08/10
Analog Design Journal Simultaneous power-down sequencing with the TPS74x01 family of linear regulators 2007/08/10
Analog Design Journal A 3-A, 1.2-Vout linear regulator with 80% efficiency and Plost < 1W 2006/10/10
EVM User's guide TPS74x01EVM-118 User's Guide 2006/06/20

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

TPS74301EVM-118 — TPS74301 평가 모듈

The TPS74301EVM-118 evaluation module (EVM) is designed to help the user easily evaluate and test the operation and functionality of the TPS74301 LDO linear regulator. The EVM uses the TPS74301, 1.5 A linear regulator with tracking and integrated power good (PG). Refer to the (...)

사용 설명서: PDF
TI.com에서 구매 불가
시뮬레이션 모델

TPS74301 PSpice Transient Model (Rev. B)

SLIM015B.ZIP (62 KB) - PSpice Model
다운로드
시뮬레이션 모델

TPS74301 TINA-TI Transient Reference Design

SLIM287.TSC (105 KB) - TINA-TI Reference Design
다운로드
시뮬레이션 모델

TPS74301 TINA-TI Transient Spice Model

SLIM286.ZIP (36 KB) - TINA-TI Spice Model
다운로드
시뮬레이션 모델

TPS74301 Unencrypted PSpice Transient Model

SBVM635.ZIP (2 KB) - PSpice Model
다운로드
회로도

5Vin Solution with 1.5-A Core Supply (Rev. A)

SLVR303A.PDF (196 KB)
다운로드
회로도

5V/12V Input DM6467 (x2) Power Ref Design Using a DCDC Controller & Converter

SLVR337.PDF (158 KB)
다운로드
패키지 핀 CAD 기호, 풋프린트 및 3D 모델
TO-263 (KTW) 7 Ultra Librarian
VQFN (RGW) 20 Ultra Librarian
TI의 평가 항목에 대한 표준 약관이 적용됩니다.

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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지원 및 교육

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