These LVDS data line receivers offers the widest common-mode input voltage range in the industry. These receivers provide an input voltage range specification compatible with a 5-V PECL signal as well as an overall increased ground-noise tolerance. They are in industry standard footprints with integrated termination as an option.
Precise control of the differential input voltage thresholds allows for inclusion of 50 mV of input voltage hysteresis to improve noise rejection on slowly changing input signals. The input thresholds are still no more than +50 mV over the full input common-mode voltage range.
The receivers can withstand ±15-kV Human-Body Model (HBM) and ±600-V Machine Model (MM) electrostatic discharges to the receiver input pins with respect to ground without damage. This provides reliability in cabled and other connections where potentially damaging noise is always a threat.
The receivers also include a (patent pending) failsafe circuit that provides a high-level output within 600 ns after loss of the input signal. The most common causes of signal loss are disconnected cables, shorted lines, or powered-down transmitters. The failsafe circuit prevents noise from being received as valid data under these fault conditions. This feature may also be used for wired-OR bus signaling. See The Active Failsafe Feature of the SN65LVDS32B application note.
The intended application and signaling technique of these devices is point-to-point baseband data transmission over controlled impedance media of approximately 100 Ω. The transmission media may be printed-circuit board traces, backplanes, or cables. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media and the noise coupling to the environment.
The SN55LVDS33 is characterized for operation from –55°C to 125°C.
|No. of Tx|
|No. of Rx|
|Signaling Rate (Mbps)|
|ESD HBM (kV)|
|ICC (Max) (mA)|
|Operating Temperature Range (C)|
|Package Size: mm2:W x L (PKG)|
| CMOS |
|-55 to 125|
|See datasheet (CFP)|