SN74HC42 4-Line To 10-Line Decoders (1 of 10) | TI.com

SN74HC42 (ACTIVE)

4-Line To 10-Line Decoders (1 of 10)

4-Line To 10-Line Decoders (1 of 10) - SN74HC42
Datasheet
 

Description

These decimal decoders consist of eight inverters and ten 4-input NAND gates. The inverters are connected in pairs to make BCD input data available for decoding by the NAND gates. Full decoding of valid input logic ensures that all inputs remain off for all invalid input conditions.

Features

  • Wide Operating Voltage Range of 2 V to 6 V
  • Outputs Can Drive Up To 10 LSTTL Loads
  • Low Power Consumption, 80-µA Max ICC
  • Typical tpd = 14 ns
  • ±4-mA Output Drive at 5 V
  • Low Input Current of 1 µA Max
  • Full Decoding of Input Logic
  • All Outputs Are High for Invalid BCD Conditions
  • Also for Applications as 3-Line to 8-Line Decoders

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Parametrics Compare all products in Encoders and Decoders

 
Function
Technology Family
VCC (Min) (V)
VCC (Max) (V)
Channels (#)
Voltage (Nom) (V)
F @ Nom Voltage (Max) (Mhz)
ICC @ Nom Voltage (Max) (mA)
tpd @ Nom Voltage (Max) (ns)
Configuration
Type
IOL (Max) (mA)
IOH (Max) (mA)
Rating
Operating Temperature Range (C)
Package Group
Package Size: mm2:W x L (PKG)
Bits (#)
Digital input leakage (Max) (uA)
ESD Charged Device Model (kV)
ESD HBM (kV)
SN74HC42 SN54HC42
Decoder
Demultiplexer    
Decoder/Demultiplexer    
HC     HC    
2     2    
6     6    
1     1    
3.3
5    
3.3
5    
28     28    
0.08     0.08    
38     38    
4:10     4:10    
Standard     Standard    
5.2     5.2/-5.2    
-5.2      
Catalog     Military    
-40 to 85     -55 to 125    
PDIP | 16
SOIC | 16
SO | 16    
CDIP | 16
LCCC | 20    
See datasheet (PDIP)
16SO: 80 mm2: 7.8 x 10.2 (SO | 16)
16SOIC: 59 mm2: 6 x 9.9 (SOIC | 16)    
See datasheet (CDIP)
20LCCC: 79 mm2: 8.89 x 8.89 (LCCC | 20)    
10     10    
5     5    
0.75     0.75    
2     2