產品詳細資料

Resolution (Bits) 16 Number of DAC channels 2 Interface type SPI Output type Unbuffered Current Settling time (µs) 0.5 Features Reset to Mid-Scale Reference type Ext Architecture Multiplying DAC Rating Catalog Output range (max) (mA/V) 2 Output range (min) (mA/V) 0 Sample/update rate (Msps) 2 Power consumption (typ) (mW) 0.025 Operating temperature range (°C) -40 to 85
Resolution (Bits) 16 Number of DAC channels 2 Interface type SPI Output type Unbuffered Current Settling time (µs) 0.5 Features Reset to Mid-Scale Reference type Ext Architecture Multiplying DAC Rating Catalog Output range (max) (mA/V) 2 Output range (min) (mA/V) 0 Sample/update rate (Msps) 2 Power consumption (typ) (mW) 0.025 Operating temperature range (°C) -40 to 85
TSSOP (PW) 16 32 mm² 5 x 6.4
  • Relative Accuracy: 1 LSB Max
  • Differential Nonlinearity: 1 LSB Max
  • 2-mA Full-Scale Current ±20%,
    With VREF = ±10 V
  • 0.5-μs Settling Time
  • Midscale or Zero-Scale Reset
  • Separate 4Q Multiplying Reference Inputs
  • Reference Bandwidth: 10 MHz
  • Reference Dynamics: –105-dB THD
  • SPI-Compatible 3-Wire Interface:
    50 MHz
  • Double Buffered Registers to Enable
    Simultaneous Multichannel Update
  • Internal Power-On Reset
  • Industry-Standard Pin Configuration

All trademarks are the property of their respective owners. All trademarks are the property of their respective owners.

  • Relative Accuracy: 1 LSB Max
  • Differential Nonlinearity: 1 LSB Max
  • 2-mA Full-Scale Current ±20%,
    With VREF = ±10 V
  • 0.5-μs Settling Time
  • Midscale or Zero-Scale Reset
  • Separate 4Q Multiplying Reference Inputs
  • Reference Bandwidth: 10 MHz
  • Reference Dynamics: –105-dB THD
  • SPI-Compatible 3-Wire Interface:
    50 MHz
  • Double Buffered Registers to Enable
    Simultaneous Multichannel Update
  • Internal Power-On Reset
  • Industry-Standard Pin Configuration

All trademarks are the property of their respective owners. All trademarks are the property of their respective owners.

The DAC8812 is a dual, 16-bit, current-output digital-to-analog converter (DAC) designed to operate from a single 2.7-V to 5.5-V supply.

The applied external reference input voltage VREF determines the full-scale output current. An internal feedback resistor (RFB) provides temperature tracking for the full-scale output when combined with an external I-to-V precision amplifier.

A double-buffered, serial data interface offers high-speed, 3-wire, SPI and microcontroller compatible inputs using serial data in (SDI), clock (CLK), and a chip-select (CS). A common level-sensitive load DAC strobe (LDAC) input allows simultaneous update of all DAC outputs from previously loaded input registers. Additionally, an internal power-on reset forces the output voltage to zero at system turnon. An MSB pin allows system reset assertion (RS) to force all registers to zero code when MSB = 0, or to midscale code when MSB = 1.

For all available packages, see the orderable addendum at the end of the data sheet.


The DAC8812 is a dual, 16-bit, current-output digital-to-analog converter (DAC) designed to operate from a single 2.7-V to 5.5-V supply.

The applied external reference input voltage VREF determines the full-scale output current. An internal feedback resistor (RFB) provides temperature tracking for the full-scale output when combined with an external I-to-V precision amplifier.

A double-buffered, serial data interface offers high-speed, 3-wire, SPI and microcontroller compatible inputs using serial data in (SDI), clock (CLK), and a chip-select (CS). A common level-sensitive load DAC strobe (LDAC) input allows simultaneous update of all DAC outputs from previously loaded input registers. Additionally, an internal power-on reset forces the output voltage to zero at system turnon. An MSB pin allows system reset assertion (RS) to force all registers to zero code when MSB = 0, or to midscale code when MSB = 1.

For all available packages, see the orderable addendum at the end of the data sheet.


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* Data sheet DAC8812 Dual, Serial-Input 16-Bit Multiplying Digital-to-Analog Converter datasheet (Rev. F) PDF | HTML 2016年 7月 11日
Application note Time Gain Control (Compensation) in Ultrasound Applications 2016年 12月 2日
Analog Design Journal 4Q 2010 Issue Analog Applications Journal 2010年 11月 15日
Analog Design Journal The IBIS model: A conduit into signal-integrity analysis, Part 1 2010年 11月 15日

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DAC8812 IBIS Model

SBAM069.ZIP (15 KB) - IBIS Model
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