現在提供此產品的更新版本

open-in-new 比較替代產品
引腳對引腳的功能與所比較的產品相同
THS4551 現行 低雜訊、精密、150MHz、全差分放大器 Wider bandwidth (BW) (135 MHz), lower noise (3.3 nV/√Hz) and higher precision (0.175 mV)

產品詳細資料

Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 2.5 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 BW at Acl (MHz) 145 Acl, min spec gain (V/V) 1 Slew rate (typ) (V/µs) 490 Architecture Bipolar, Fully Differential ADC Driver Vn at flatband (typ) (nV√Hz) 4.6 Iq per channel (typ) (mA) 1.14 Rail-to-rail In to V-, Out Vos (offset voltage at 25°C) (max) (mV) 2 Operating temperature range (°C) -40 to 85 Iout (typ) (mA) 55 2nd harmonic (dBc) 133 3rd harmonic (dBc) 141 Frequency of harmonic distortion measurement (MHz) 0.001 GBW (typ) (MHz) 95 Input bias current (max) (pA) 900000 Features Shutdown CMRR (typ) (dB) 102 Rating Catalog
Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 2.5 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 BW at Acl (MHz) 145 Acl, min spec gain (V/V) 1 Slew rate (typ) (V/µs) 490 Architecture Bipolar, Fully Differential ADC Driver Vn at flatband (typ) (nV√Hz) 4.6 Iq per channel (typ) (mA) 1.14 Rail-to-rail In to V-, Out Vos (offset voltage at 25°C) (max) (mV) 2 Operating temperature range (°C) -40 to 85 Iout (typ) (mA) 55 2nd harmonic (dBc) 133 3rd harmonic (dBc) 141 Frequency of harmonic distortion measurement (MHz) 0.001 GBW (typ) (MHz) 95 Input bias current (max) (pA) 900000 Features Shutdown CMRR (typ) (dB) 102 Rating Catalog
SOIC (D) 8 29.4 mm² 4.9 x 6 VSSOP (DGK) 8 14.7 mm² 3 x 4.9
  • Fully Differential Architecture
  • Bandwidth: 145 MHz (AV = 1 V/V)
  • Slew Rate: 490 V/µs
  • HD2: –133 dBc at 10 kHz (1 VRMS,
    RL = 1 kΩ)
  • HD3: –141 dBc at 10 kHz (1 VRMS,
    RL = 1 kΩ)
  • Input Voltage Noise: 4.6 nV/√Hz
    (f = 100 kHz)
  • THD+N: –112dBc (0.00025%) at
    1 kHz (22-kHz BW, G = 1, 5 VPP)
  • Open-Loop Gain: 119 dB (DC)
  • NRI–Negative Rail Input
  • RRO–Rail-to-Rail Output
  • Output Common-Mode Control
    (with Low Offset)
  • Power Supply:
    • Voltage: +2.5 V (±1.25 V) to
      +5.5 V (±2.75 V)
    • Current: 1.14 mA/ch
  • Power-Down Capability: 20 µA (typical)
  • Fully Differential Architecture
  • Bandwidth: 145 MHz (AV = 1 V/V)
  • Slew Rate: 490 V/µs
  • HD2: –133 dBc at 10 kHz (1 VRMS,
    RL = 1 kΩ)
  • HD3: –141 dBc at 10 kHz (1 VRMS,
    RL = 1 kΩ)
  • Input Voltage Noise: 4.6 nV/√Hz
    (f = 100 kHz)
  • THD+N: –112dBc (0.00025%) at
    1 kHz (22-kHz BW, G = 1, 5 VPP)
  • Open-Loop Gain: 119 dB (DC)
  • NRI–Negative Rail Input
  • RRO–Rail-to-Rail Output
  • Output Common-Mode Control
    (with Low Offset)
  • Power Supply:
    • Voltage: +2.5 V (±1.25 V) to
      +5.5 V (±2.75 V)
    • Current: 1.14 mA/ch
  • Power-Down Capability: 20 µA (typical)

The THS4521, THS4522, and THS4524 family of devices are very low-power, fully differential amplifiers with rail-to-rail output and an input common-mode range that includes the negative rail. These amplifiers are designed for low-power data acquisition systems and high-density applications where power dissipation is a critical parameter, and provide exceptional performance in audio applications.

The family includes single FDA (THS4521), dual FDA (THS4522), and quad FDA (THS4524) versions.

These fully differential amplifiers feature accurate output common-mode control that allows for dc-coupling when driving analog-to-digital converters (ADCs). This control, coupled with an input common-mode range below the negative rail as well as rail-to-rail output, allows for easy interfacing between single-ended, ground-referenced signal sources. Additionally, these devices are ideally suited for driving both successive-approximation register (SAR) and delta-sigma (ΔΣ) ADCs using only a single +2.5V to +5V and ground power supply.

The THS4521, THS4522, and THS4524 family of fully differential amplifiers is characterized for operation over the full industrial temperature range from –40°C to +85°C.

The THS4521, THS4522, and THS4524 family of devices are very low-power, fully differential amplifiers with rail-to-rail output and an input common-mode range that includes the negative rail. These amplifiers are designed for low-power data acquisition systems and high-density applications where power dissipation is a critical parameter, and provide exceptional performance in audio applications.

The family includes single FDA (THS4521), dual FDA (THS4522), and quad FDA (THS4524) versions.

These fully differential amplifiers feature accurate output common-mode control that allows for dc-coupling when driving analog-to-digital converters (ADCs). This control, coupled with an input common-mode range below the negative rail as well as rail-to-rail output, allows for easy interfacing between single-ended, ground-referenced signal sources. Additionally, these devices are ideally suited for driving both successive-approximation register (SAR) and delta-sigma (ΔΣ) ADCs using only a single +2.5V to +5V and ground power supply.

The THS4521, THS4522, and THS4524 family of fully differential amplifiers is characterized for operation over the full industrial temperature range from –40°C to +85°C.

下載 觀看有字幕稿的影片 影片

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 15
類型 標題 日期
* Data sheet THS452x Very Low Power, Negative Rail Input, Rail-To-Rail Output, Fully Differential Amplifier datasheet (Rev. H) PDF | HTML 2015年 6月 18日
Circuit design High-speed overcurrent detection circuit (Rev. A) 2019年 1月 17日
E-book The Signal e-book: A compendium of blog posts on op amp design topics 2017年 3月 28日
Application note Fully-Differential Amplifiers (Rev. E) 2016年 9月 19日
More literature Featured High Speed Differential Amplifiers 2012年 10月 23日
Analog Design Journal Converting single-ended video to differential video in single-supply systems 2011年 9月 16日
Analog Design Journal Using single-supply fully diff. amps with neg. input voltages to drive ADCs 2010年 11月 15日
Application note DC Output Errors in a Fully-Differential Amplifier 2010年 5月 25日
Analog Design Journal Using fully differential op amps as attenuators, Part 3 2009年 10月 4日
EVM User's guide THS4521/45222/4524EVM User's Guide 2009年 7月 16日
Analog Design Journal Using fully differential op amps as attenuators, Part 2 2009年 7月 14日
Analog Design Journal Using fully differential op amps as attenuators, Part 1 2009年 5月 1日
Analog Design Journal Analysis of fully differential amplifiers 2005年 3月 11日
Analog Design Journal Designing for low distortion with high-speed op amps 2005年 3月 2日
Application note Noise Analysis for High Speed Op Amps (Rev. A) 2005年 1月 17日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

REF6025EVM-PDK — REF6025 電壓參考評估模組

The REF6025EVM-PDK is a platform for evaluating the performance of the REF6025 voltage reference. The evaluation kit brings out the burst mode performance of the device which is a key feature of the device.
使用指南: PDF
TI.com 無法提供
開發板

THS4521EVM — THS4521 評估模組

The THS4521EVM is an evaluation module for the single, THS4521 in the D (8-lead SOIC) package.

The THS4521EVM is designed to quickly and easily demonstrate the functionality and versatility of the amplifier. The EVM is ready to connect to power, signal source, and test instruments through the use of (...)

使用指南: PDF
TI.com 無法提供
模擬型號

THS4521 PSpice Model (Rev. E)

SBOM343E.ZIP (36 KB) - PSpice Model
模擬型號

THS4521 TINA-TI Reference Design (Rev. E)

SBOM341E.TSC (1619 KB) - TINA-TI Reference Design
模擬型號

THS4521 TINA-TI Spice Model (Rev. D)

SBOM342D.ZIP (16 KB) - TINA-TI Spice Model
計算工具

SBOR022 TI FDA Calculator

支援產品和硬體

支援產品和硬體

產品
全差分放大器
LMH6550 400MHz 差動高速運算放大器 LMH6551 370MHz 差動高速運算放大器 LMH6552 1.5 GHz 全差動放大器 LMH6553 具輸出限制箝位的 900 MHz 全差動放大器 LMH6554 2.8 GHz 超線性全差動放大器 LMP8350 具可選功耗模式的超低失真全差動精密 ADC 驅動器 OPA862 12.6V、低雜訊、單端到差分、高輸入阻抗放大器 THS4120 具有關機功能的 3.3 V、100 MHz、43 V/us、全差分 CMOS 放大器 THS4121 3.3 V、100 MHz、43 V/us、全差分 CMOS 放大器 THS4130 具有關機功能的 150MHz 全差分輸入/輸出低雜訊放大器 THS4131 全差分輸入/輸出低雜訊放大器 THS4140 具有關機功能的 160MHz 全差分輸入/輸出高電壓轉換率放大器 THS4141 160MHz 全差分輸入/輸出高電壓轉換率放大器 THS4150 具有關機功能的 150MHz 全差分輸入/輸出高電壓轉換率放大器 THS4151 150MHz 全差分輸入/輸出高電壓轉換率放大器 THS4500 具有斷電功能的 15V 高速全差分放大器 THS4501 高速全差動放大器,+/-5V THS4503 高速全差分放大器 THS4504 具有關機功能的寬頻低失真全差分放大器 THS4505 寬頻、低失真、全差動放大器 THS4508 寬頻全差分放大器 THS4509 1.9-GHz、寬頻、低雜訊、低失真、全差分放大器 THS4511 1.6-GHz、均一增益、寬頻、低雜訊、低失真、全差分放大器 THS4513 1.6-GHz、最小增益 1-V/V、低雜訊、低失真、全差動放大器 THS4520 軌至軌輸出寬頻全差動放大器 THS4521 極低功耗軌至軌輸出全差動放大器 THS4522 極低功率雙通道軌至軌輸出全差動放大器 THS4524 極低功耗四通道軌至軌輸出全差動放大器 THS4531 超低功耗 0.25mA、RRO、全差分放大器 THS4531A 超低功耗、RRO、全差動放大器 THS4532 雙路、超低功耗 0.25mA、RRO、全差動放大器 THS4541 高速差分 I/O 放大器 THS4551 低雜訊、精密、150MHz、全差分放大器 THS4552 雙通道、低雜訊、精密、150-MHz、全差分放大器 THS4561 低功耗、60MHz、寬電源供電範圍全差分放大器 THS4567 具有 VICM 和 VOCM 控制的 220 MHz CMOS 輸入全差動放大器 THS770006 具 +6dB 固定增益的高速全差動 ADC 驅動器放大器
音訊運算放大器
OPA1637 高保真、高電壓 (36V)、低雜訊 (3.7nV/rtHz) Burr-Brown™ 音訊全差動放大器
精密度運算放大器 (Vos<1mV)
THP210 高精密度 (40-μV、0.1μV/C)、高電壓 (36-V)、低雜訊 (3.7-nV/√Hz)、全差動放大器
RF FDA
LMH3401 7 GHz 超寬頻全差動放大器 LMH5401 8 GHz 超寬頻全差動放大器
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
參考設計

TIPD117 — 適用於光學編碼器的 12 位元、1 MSPS 雙通道資料採集系統

This TI Precision Verified Design provides the theory, component selection, simulation, PCB design, and measurement details for a 12-bit 1-MSPS single supply dual channel simultaneous data acquisition system. This circuit achieves 73 dB SINAD for a 4.5 V differential signal at 2 KHz input (...)
使用指南: PDF
電路圖: PDF
參考設計

TIDM-ULTRASONIC-WATER-FLOW-MEASUREMENT — 超音波水流量測參考設計

This Ultrasonic Water Flow Measurement system is ideal for providing highly accurate measurement across wide flow ranges as low as 1.4gpm. The design is based on a single MCU with discrete analog components. It uses a unique propriety algorithm that improves robustness and performance in flow (...)
Design guide: PDF
電路圖: PDF
參考設計

TIPD115 — 採用最低失真、最低雜訊最佳化設定的 18 位元、1 MSPS 資料採集參考設計

This verified design is a high performance data acquisition system (DAQ) using an 18-bit SAR ADC, ADS8881 at a throughput of 1MSPS. This design has been optimized to provide the lowest noise & distortion solution for a full scale input sinewave of 10 KHz. This leads to a maximum possible value (...)
使用指南: PDF
電路圖: PDF
參考設計

TIDA-00499 — 使用差動放大器和 HS ADC 的暫態及數位故障記錄器 AFE 參考設計

While Digital Fault Recorders (DFRs) can detect transients in 17/20 μs at 60/50 Hz, transient recorders capture disturbances that can peak and decay well within a microsecond. This reference design demonstrates the capturing of transient inputs at up to 1 MHz for DFR and 25 MHz for (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-00715 — 適用於電壓輸出差動音訊 DAC 的高動態範圍耳機驅動器參考設計

A low THD+N amplifier signal chain for driving headphones is presented. The design walks through various factors to consider in order to optimize performance based on customer needs.
Design guide: PDF
電路圖: PDF
封裝 引腳 下載
SOIC (D) 8 檢視選項
VSSOP (DGK) 8 檢視選項

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 資格摘要
  • 進行中可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片