Frequency domain applications cover a wide range of frequencies from low input frequencies at or near DC in the 1st Nyquist zone to undersampling in higher Nyquist zones. If very low input frequency is supported then the input has to be DC coupled and the ADC driven by a fully differential amplifier (FDA). If low frequency support is not needed then AC coupling and use of a balun may be more suitable.
The internal reference is used since DC precision is not needed. However the ADC AC performance is highly dependent on the quality of the external clock source. If in-band interferers can be present then the ADC SFDR performance will be a key care about as well. A higher ADC sampling rate is desirable in order to relax the external anti-aliasing filter – an internal decimation filter can be used to reduce the digital output rate afterwards.
|Signal Bandwidth||DC to 20 MHz|
|Input Driver||Single ended to differential signal conversion and DC coupling|
|Clock Source||External clock with low jitter|
When designing the amplifier/filter driving circuit, the ADC input full-scale voltage needs to be taken into consideration. For example, the ADC364x input full-scale is 2.25 Vpp. When factoring in ~ 1 dB for insertion loss of the filter, then the amplifier needs to deliver close to 2.5 Vpp. The amplifier distortion performance will degrade with a larger output swing and considering the ADC common mode input voltage the amplifier may not be able to deliver the full swing. The ADC364x provides an output common mode voltage of 0.95V and the THS4541 for example can only swing within 250 mV of its negative supply. A unipolar 3.3 V amplifier power supply will thus limit the maximum voltage swing to ~ 2.8Vpp. Additionally input voltage protection diodes may be needed to protect the ADC from over-voltage events.
|DEVICE||MIN OUTPUT VOLTAGE||MAX SWING WITH 3.3 V/ 0 V SUPPLY|
|THS4541||VS- + 250 mV||2.8 Vpp|