Dual, 14-bit, 1-MSPS to 65-MSPS, low-noise, ultra-low-power, analog-to-digital converter (ADC)


Product details


Sample rate (Max) (MSPS) 65 Resolution (Bits) 14 Number of input channels 2 Interface type CMOS Analog input BW (MHz) 900 Features High Performance, Low Power Rating Catalog Input range (Vp-p) 2.25 Power consumption (Typ) (mW) 144 Architecture SAR SNR (dB) 79 ENOB (Bits) 12.8 SFDR (dB) 93 Operating temperature range (C) -40 to 105 Input buffer No open-in-new Find other High-speed ADCs (>10MSPS)

Package | Pins | Size

WQFN (RSB) 40 25 mm² 5 x 5 open-in-new Find other High-speed ADCs (>10MSPS)


  • Dual channel
  • 14-bit 10/25/65 MSPS ADC
  • Noise floor: –155 dBFS/Hz
  • Ultra-low power with optimized power scaling: 29 mW/ch (10 MSPS) to 72 mW/ch (65 MSPS)
  • Latency: 1 clock cycle
  • 14-Bit, no missing codes
  • INL: ±0.6 LSB; DNL: ±0.2 LSB
  • Reference: external or internal
  • Industrial temperature range: –40°C to +105°C
  • On-chip digital filter (optional)
    • Decimation by 2, 4, 8, 16, 32
    • 32-bit NCO
  • DDR and Serial CMOS interface
  • Small footprint: 40-VQFN (5 mm × 5 mm) package
  • Single 1.8-V supply
  • Spectral performance (fIN = 5 MHz):
    • SNR: 79.0 dBFS
    • SFDR: 93-dBc HD2, HD3
    • SFDR: 101-dBFS worst spur
  • Spectral performance (fIN = 64 MHz):
    • SNR: 74.0 dBFS
    • SFDR: 84-dBc HD2, HD3
    • SFDR: 90-dBFS worst spur
open-in-new Find other High-speed ADCs (>10MSPS)


The ADC364x family of devices are low-noise, ultra-low power, 14-bit, 10-MSPS to 65-MSPS dual-channel, high-speed analog-to-digital converters (ADCs). Designed for low power consumption, these devices deliver a noise spectral density of –155 dBFS/Hz, combined with excellent linearity and dynamic range. The ADC364x offers very good dc precision, together with IF sampling support, which make the device an excellent choice for a wide range of applications. High-speed control loops benefit from the short latency of only one clock cycle. The ADC consumes only 72 mW/ch at 65 MSPS, and power consumption scales well with lower sampling rates.

The ADC364x use a DDR or serial CMOS interface to output the data offering lowest power digital interface, together with flexibility to minimize the number of digital interconnects. These devices are a pin-to-pin compatible family with different speed grades. These devices support the extended industrial temperature range of –40 to +105⁰C.

open-in-new Find other High-speed ADCs (>10MSPS)

Technical documentation

star = Top documentation for this product selected by TI
No results found. Please clear your search and try again.
View all 9
Type Title Date
* Data sheet ADC364x 14-bit, 10-MSPS to 65-MSPS, Low-Noise, Low Power Dual Channel ADC datasheet Sep. 20, 2017
Application note High-Speed ADC: How to Properly Terminate Single-ended CMOS Digital Outputs Dec. 09, 2020
Application note High Speed SAR ADC: Data Rate, Performance, and Pin Count Optimization Dec. 08, 2020
Technical article Keys to quick success using high-speed data converters Oct. 13, 2020
Application note How to simplify AFE filtering via high‐speed ADCs with internal digital filters Jan. 10, 2020
User guide ADC364xEVM User's Guide Nov. 11, 2019
Technical article How to achieve fast frequency hopping Mar. 03, 2019
Technical article RF sampling: Learning more about latency Feb. 09, 2017
Technical article Why phase noise matters in RF sampling converters Nov. 28, 2016

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

document-generic User guide

The ADC3643 evaluation module (EVM) demonstrates the performance of the ADC3643, which is an ultra-low-power, high-linearity, analog-to-digital converter (ADC). Onboard voltage regulation and flexible analog input options allow easy evaluation for many different applications.

For a complete (...)

  • Parallel/serial CMOS interface
  • USB powered with onboard power regulation
  • Pin compatible with ADC364x products
  • THS4541 FDA and Balun-coupled inputs allow for flexible evaluation
  • TSW1400EVM and DATACONVERTERPRO-SW allow for easy data capture
  • FMC connector allows for easy integration with FPGA development (...)

Design tools & simulation

SBAM455.ZIP (158 KB) - TINA-TI Reference Design
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
SBAR014A.ZIP (13706 KB)
SBAR017.ZIP (7671 KB)

CAD/CAE symbols

Package Pins Download
WQFN (RSB) 40 View options

Ordering & quality

Information included:
  • RoHS
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

Recommended products may have parameters, evaluation modules or reference designs related to this TI product.

Support & training

TI E2E™ forums with technical support from TI engineers

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​