The ADS124S0x system clock is either provided by the internal low-drift 4.096-MHz oscillator or an external clock source on the CLK input. Use the CLK bit within the data rate register (04h) to select the internal
4.096-MHz oscillator or an external clock source.
The device defaults to using the internal oscillator. If the device is reset (from either the RESET pin, or the RESET command), then the clock source returns to using the internal oscillator even if an external clock is selected.