The devices require a reference voltage for operation. The ADS124S0x offers an integrated low-drift 2.5-V reference. For applications that require a different reference voltage value or a ratiometric measurement approach, the ADS124S08 offers two differential reference input pairs (REFP0, REFN0 and REFP1, REFN1). The differential reference inputs allow freedom in the reference common-mode voltage. REFP0 and REFN0 are dedicated reference inputs, whereas REFP1 and REFN1 are shared with inputs AIN6 and AIN7 (respectively) on the ADS124S08. The specified external reference voltage range is 0.5 V to AVDD. The reference voltage is shown in Equation 7, where V(REFPx) and V(REFNx) are the absolute positive and absolute negative reference voltages.
The polarity of the reference voltage internal to the ADC must be positive. The magnitude of the reference voltage together with the PGA gain establishes the ADC full-scale differential input range as defined by
FSR = ±VREF / Gain.
Figure 52 shows the block diagram of the reference multiplexer. The ADC reference multiplexer selects between the internal reference and two external references (REF0 and REF1). The reference multiplexer is programmed with the REFSEL[1:0] bits in the reference control register (05h). By default, the external reference pair REFP0, REFN0 is selected.
The ADC also contains an integrated reference voltage monitor. This monitor provides continuous detection of a low or missing reference during the conversion cycle. The reference monitor flags (FL_REF_L0 and FL_REF_L1) are set in the STATUS byte and described in the Reference Monitor section.