SBAS660C August 2016 – June 2017 ADS124S06 , ADS124S08
Refer to the PDF data sheet for device specific package drawings
After the power supplies are turned on, the ADC remains in reset until DVDD, IOVDD, and the analog power supply (AVDD – AVSS) voltage exceed the respective power-on reset (POR) voltage thresholds. If a POR event has occurred, the FL_POR flag (bit 7 of the STATUS byte) is set. This flag indicates that a POR event has occurred and has not been cleared. This flag is cleared with a user register write to set the bit to 0. The power-on reset is described further in the Power-On Reset section.