The offset calibration word is 24 bits, consisting of three 8-bit registers, as shown in the three registers starting with offset calibration register 1. The offset value is twos complement format with a maximum positive value equal to 7FFFFFh, and a maximum negative value equal to 800000h. This value is subtracted from each output reading as an offset correction. A register value equal to 000000h has no offset correction. If global chop mode is enabled, the offset calibration register is disabled. Table 21 shows example settings of the offset register.
|OFC REGISTER VALUE||OFFSET CALIBRATED OUTPUT CODE(1)|
The user can select how many samples (1, 4, 8, or 16) to average for self or system offset calibration using the CAL_SAMP[1:0] bits in the system control register (09h). Fewer readings shorten the calibration time but also provide less accuracy. Averaging more readings takes longer but yields a more accurate calibration result by reducing the noise level.
Two commands can be used to perform offset calibration. SFOCAL is a self offset calibration that internally sets the input to mid-scale using the SYS_MON[2:0] = 001 setting and takes a measurement of the offset. SYOCAL is a system offset calibration where the user must input a null voltage to calibrate the system offset. After either command is issued, the OFC register is updated.
After an offset calibration is performed, the device starts a new conversion and DRDY falls to indicate a new conversion has completed.