SBASA44B august   2021  – june 2023 AFE7900

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Revision History
  6. 5Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Transmitter Electrical Characteristics
    6. 5.6  RF ADC Electrical Characteristics
    7. 5.7  PLL/VCO/Clock Electrical Characteristics
    8. 5.8  Digital Electrical Characteristics
    9. 5.9  Power Supply Electrical Characteristics
    10. 5.10 Timing Requirements
    11. 5.11 Switching Characteristics
    12. 5.12 Typical Characteristics
      1. 5.12.1  RX Typical Characteristics 30 MHz and 400 MHz
      2. 5.12.2  RX Typical Characteristics at 800MHz
      3. 5.12.3  RX Typical Characteristics 1.75GHz to 1.9GHz
      4. 5.12.4  RX Typical Characteristics 2.6GHz
      5. 5.12.5  RX Typical Characteristics 3.5GHz
      6. 5.12.6  RX Typical Characteristics 4.9GHz
      7. 5.12.7  TX Typical Characteristics at 30MHz and 400MHz
      8. 5.12.8  TX Typical Characteristics at 800MHz
      9. 5.12.9  TX Typical Characteristics at 1.8GHz
      10. 5.12.10 TX Typical Characteristics at 2.6GHz
      11. 5.12.11 TX Typical Characteristics at 3.5GHz
      12. 5.12.12 TX Typical Characteristics at 4.9GHz
      13. 5.12.13 TX Typical Characteristics at 7.1GHz
      14. 5.12.14 PLL and Clock Typical Characteristics
  7. 6Device and Documentation Support
    1. 6.1 Receiving Notification of Documentation Updates
    2. 6.2 Support Resources
    3. 6.3 Trademarks
    4. 6.4 Electrostatic Discharge Caution
    5. 6.5 Glossary
  8. 7Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

TX Typical Characteristics at 3.5GHz

Typical values at TA = +25°C with nominal supplies. Unless otherwise noted, TX input data rate = 491.52MSPS, fDAC = 11796.48MSPS, interleave mode, AOUT = –1 dBFS, 1st Nyquist zone output, Internal PLL, fREF = 491.52MSPS, 24x Interpolation, DSA = 0 dB, Sin(x)/x enabled, DSA calibrated.

GUID-36CBB411-6167-442E-8B13-56F54A2CADE0-low.gif
Aout = -0.5dFBS, 3.5 GHz Matching, included PCB and cable losses
Figure 5-422 TX Output Power vs DSA Setting at 3.5 GHz
GUID-6F616D5C-3739-4C79-84B3-A6AB25DD9560-low.gif
3.5 GHz Matching, included PCB and cable losses
Differential Gain Error = POUT(DSA Setting – 1) – POUT(DSA Setting) + 1
Figure 5-424 TX Uncalibrated Differential Gain Error vs DSA Setting and Channel at 3.5 GHz
GUID-E37E12B1-BE13-4478-90E6-A13B63001E03-low.gif
3.5 GHz Matching, included PCB and cable losses
Integrated Gain Error = POUT(DSA Setting) – POUT(DSA Setting = 0) + (DSA Setting)
Figure 5-426 TX Uncalibrated Integrated Gain Error vs DSA Setting and Channel at 3.5 GHz
GUID-EC3B0154-F173-4317-B9D8-9ED70409D1F8-low.gif
3.5 GHz Matching, included PCB and cable losses
Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting)
Figure 5-428 TX Uncalibrated Differential Phase Error vs DSA Setting and Channel at 3.5 GHz
GUID-454DE2E9-C809-4512-BD76-7FEF394BFCF6-low.gif
3.5 GHz Matching, included PCB and cable losses
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 5-430 TX Uncalibrated Integrated Phase Error vs DSA Setting and Channel at 3.5 GHz
GUID-8A588E33-5844-42FC-94AC-1B9547647C5D-low.gif
3.5 GHz Matching, 1TX
Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting)
Figure 5-432 TX Uncalibrated Differential Gain Error vs DSA Setting and Temperature at 3.5 GHz
GUID-DC17FDEC-0E4E-48B0-B7CE-AD44EF56B60C-low.gif
3.5 GHz Matching, 1TX
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 5-434 TX Uncalibrated Integrated Gain Error vs DSA Setting and Temperature at 3.5 GHz
GUID-9F6A1D8A-76B9-440E-AD8C-E9705FAF40CD-low.gif
3.5 GHz Matching, 1TX
Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting)
Figure 5-436 TX Uncalibrated Differential Phase Error vs DSA setting and Temperature at 3.5 GHz
GUID-B9272FA7-8384-4083-834C-A33A61146B8C-low.gif
3.5 GHz Matching, 1TX
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting=0)
Figure 5-438 TX Uncalibrated Integrated Phase Error vs DSA Setting and Temperature at 3.5 GHz
GUID-73DB1E7A-B58B-435B-A422-66A7B83613FC-low.gif
fDAC=11796.48MSPS, interleave mode, matching at 3.5GHz, Aout = –13 dBFS.
Figure 5-440 TX NSD vs DSA Setting at 3.5 GHz
GUID-20220629-SS0I-GCL0-QS5S-KSJH2GTP0KQH-low.svg
fDAC=12MSPS, external clock mode, non-interleave mode
Figure 5-442 TX NSD vs Digital Amplitude and Channel at 3.75 GHz
GUID-20220629-SS0I-NKCH-4ZCP-NV5LKRQNSGZB-low.svg
20-MHz tone spacing, 3.5 GHz Matching
Figure 5-444 TX IMD3 vs Digital Amplitude and Channel at 3.5 GHz
GUID-20220629-SS0I-ZKQH-PH7J-JNFRBHGTPSV0-low.svg
External clock mode, non-interleave mode
Figure 5-446 TX IMD3 vs Tone Spacing and Channel at 3.75GHz
GUID-20220629-SS0I-ZR4D-JT4X-LNRTPJ52XFPR-low.svg
Inband = 3.75GHz ± 600MHz, fDAC = 9GSPS, external clock mode, non-interleave mode.
Figure 5-448 Two Tone Inband SFDR vs Digital Amplitude at 3.75GHz
GUID-5A53ECB6-F8A6-4E9B-86A0-A6923F4D54F6-low.gif
3.5 GHz Matching, single carrier 100-MHz BW NR TM1.1
Figure 5-450 TX 100-MHz NR Output Spectrum at 3.5 GHz (Band 42)
GUID-BE4E66AF-331C-4F49-8609-B30AC1639030-low.gif
3.5 GHz Matching, single carrier 20-MHz BW TM1.1 LTE
Figure 5-452 TX 20-MHz LTE ACPR vs DSA Setting at 3.5 GHz
GUID-6C44FA01-2E05-49B2-A3D7-33A4F57C7557-low.gif
3.5 GHz Matching, single carrier 100-MHz BW NR TM1.1
Figure 5-454 TX 100-MHz NR ACPR vs DSA Setting at 3.5 GHz
GUID-FAB95785-0D58-469C-B46D-2A593438C0B9-low.gif
3.5 GHz Matching, single carrier 20-MHz BW TM1.1 LTE
Figure 5-456 TX 20-MHz LTE ACPR vs Digital Level at 3.5 GHz
GUID-A1DE3C83-86F7-4D3D-8938-65EC9FEFF11D-low.gif
3.5 GHz Matching, single carrier 100-MHz BW NR TM1.1
Figure 5-458 TX 100-MHz NR ACPR vs Digital Level at 3.5 GHz
GUID-5E221A1B-39A9-4C9C-919C-157B1FD475FB-low.gif
Matching at 3.5 GHz, fDAC = 11.79648GSPS, interleave mode, normalized to output power at harmonic frequency
Figure 5-460 TX Single Tone HD2 vs Frequency and Digital Level at 3.5 GHz
GUID-9DA9D349-D1C2-4582-8FD6-D38D4615C51F-low.gif
Matching at 3.5 GHz, fDAC = 11.79648GSPS, interleave mode.
Figure 5-462 TX Single Tone (–1 dBFS) Output Spectrum at 3.5 GHz (0 - fDAC)
GUID-C7EFB0AA-05E2-4A3C-A1AC-965B777135B6-low.gif
Matching at 3.5 GHz, fDAC = 11.79648GSPS, interleave mode.
Figure 5-464 TX Single Tone (–6 dBFS) Output Spectrum at 3.5 GHz (0-fDAC)
GUID-851064B3-9AE7-4AB5-9590-2197A2CEA61C-low.gif
Matching at 3.5 GHz, fDAC = 11.79648GSPS, interleave mode.
Figure 5-466 TX Single Tone (–12 dBFS) Output Spectrum at 3.5 GHz (0-fDAC)
GUID-20210708-CA0I-CVPV-67XV-LDF4GWHZHJR5-low.png
Matching at 3.5 GHz, 50MHz tone spacing, fDAC = 12GSPS, non-interleave mode.
Figure 5-468 TX Dual Tone Output Spectrum at 3.75 GHz, -7dBFS each (0 - fDAC)
GUID-20210708-CA0I-F9CC-MZD8-TDQBLTFKG652-low.svg
Matching at 3.5 GHz, 50MHz tone spacing, fDAC = 12GSPS, non-interleave mode.
Figure 5-470 TX Dual Tone Output Spectrum at 3.75 GHz, -13dBFS each (0 - fDAC)
GUID-20210708-CA0I-MQ05-BGXR-WL7FGZRHRQD4-low.png
Matching at 3.5 GHz, 50MHz tone spacing, fDAC = 12GSPS, non-interleave mode.
Figure 5-472 TX Dual Tone Output Spectrum at 3.75 GHz, -30dBFS each (0 - fDAC)
GUID-20210707-CA0I-N18S-SK65-3F3MXWH3VD6P-low.svg
fDAC = fCLK = 12GSPS, non-interleave mode.
Figure 5-474 External Clock Additive Phase Noise at 3.7GHz
GUID-80543382-7389-4A45-B6CE-ACB58AB8D087-low.gif
Aout = -0.5dFBS, 3.5 GHz Matching, included PCB and cable losses
Figure 5-423 TX Output Power vs Frequency
GUID-37639B62-771A-44D6-A651-52A9D926550C-low.gif
3.5 GHz Matching, included PCB and cable losses
Differential Gain Error = POUT(DSA Setting – 1) – POUT(DSA Setting) + 1
Figure 5-425 TX Calibrated Differential Gain Error vs DSA Setting and Channel at 3.5 GHz
GUID-7FF36ED1-838F-4768-B421-FA61786272A5-low.gif
3.5 GHz Matching, included PCB and cable losses
Integrated Gain Error = POUT(DSA Setting) – POUT(DSA Setting = 0) + (DSA Setting)
Figure 5-427 TX Calibrated Integrated Gain Error vs DSA Setting and Channel at 3.5 GHz
GUID-2EA4094E-4A3D-4390-A845-BD4262DB962E-low.gif
3.5 GHz Matching, included PCB and cable losses
Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting). Phase DNL spike may occur at any DSA setting.
Figure 5-429 TX Calibrated Differential Phase Error vs DSA Setting and Channel at 3.5 GHz
GUID-D272173E-EBAD-4FC7-B0BC-57337C23AEFC-low.gif
3.5 GHz Matching, included PCB and cable losses
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 5-431 TX Calibrated Integrated Phase Error vs DSA Setting and Channel at 3.5 GHz
GUID-2D0AEA7D-29B0-4F2B-80EB-02417D2CC315-low.gif
3.5 GHz Matching, 1TX, Calibrated at 25°C
Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting)
Figure 5-433 TX Calibrated Differential Gain Error vs DSA Setting and Temperature at 3.5 GHz
GUID-5C7AB861-6024-445E-9A25-C17A04B4D542-low.gif
3.5 GHz Matching, 1TX, Calibrated at 25°C
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 5-435 TX Calibrated Integrated Gain Error vs DSA Setting and Temperature at 3.5 GHz
GUID-0748D0BC-42C7-4C0A-A09B-6B49F595FD37-low.gif
3.5 GHz Matching, 1TX, Calibrated at 25°C
Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting)
Figure 5-437 TX Calibrated Differential Phase Error vs DSA Setting and Temperature at 3.5 GHz
GUID-DADB0169-BA36-4F7F-B8D6-F3A4051E8B71-low.gif
3.5 GHz Matching, 1TX, Calibrated at 25°C
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 5-439 TX Calibrated Integrated Phase Error vs DSA Setting and Temperature at 3.5 GHz
GUID-20210708-CA0I-XZZ4-NPLL-4QBTVBPS5L17-low.png
fDAC=12MSPS, external clock mode, non-interleave mode
Figure 5-441 TX NSD vs Digital Amplitude and Temperature at 3.75 GHz
GUID-1F8A4092-FEB1-43AF-BDC5-40657AD819EB-low.gif
20-MHz tone spacing, 3.5 GHz Matching, –13 dBFS each tone, included PCB and cable losses
Figure 5-443 TX IMD3 vs DSA Setting at 3.5 GHz
GUID-20210708-CA0I-J8JL-BNHP-MLCJT1B7BFHN-low.png
50-MHz tone spacing, external clock mode, non-interleave mode
Figure 5-445 TX IMD3 vs Tone Spacing and Amplitude at 3.75GHz
GUID-20210708-CA0I-VPZG-2NZC-XJLJZRWVK4G1-low.svg
50-MHz tone spacing, external clock mode, non-interleave mode
Figure 5-447 TX IMD3 vs Digital Amplitude and Temperature at 3.75GHz
GUID-6BA7898E-D76D-4BFD-8CC7-2F0709EF7CC4-low.gif
3.5 GHz Matching, single carrier 20-MHz BW TM1.1 LTE
Figure 5-449 TX 20-MHz LTE Output Spectrum at 3.5 GHz (Band 42)
GUID-FCBE5FEA-DEAA-4A4F-B61F-4B792EA23976-low.gif
3.5 GHz Matching, single carrier 100-MHz BW NR TM1.1
Figure 5-451 TX 2 carrier 100-MHz NR Output Spectrum at 3.45 GHz and 3.75 GHz
GUID-DFEBB523-E316-4B51-B248-683BD512DE4F-low.gif
3.5 GHz Matching, single carrier 20-MHz BW TM1.1 LTE
Figure 5-453 TX 20-MHz LTE alt-ACPR vs DSA Setting at 3.5 GHz
GUID-953B77E7-1695-4CBC-88FE-5E3F19C8981F-low.gif
3.5 GHz Matching, single carrier 100-MHz BW NR TM1.1
Figure 5-455 TX 100-MHz NR alt-ACPR vs DSA Setting at 3.5 GHz
GUID-18F64686-760E-41FB-9706-4D6BFD0F39A4-low.gif
3.5 GHz Matching, single carrier 20-MHz BW TM1.1 LTE
Figure 5-457 TX 20-MHz LTE alt-ACPR vs Digital Level at 3.5 GHz
GUID-5B367B1A-D978-42F6-80B3-F341A4033904-low.gif
3.5 GHz Matching, single carrier 100-MHz BW NR TM1.1
Figure 5-459 TX 100-MHz NR alt-ACPR vs Digital Level at 3.5 GHz
GUID-AE9341AD-496B-4ED9-93F3-A9487077B959-low.gif
Matching at 3.5 GHz, fDAC = 11.79648GSPS, interleave mode, normalized to output power at harmonic frequency. Dip is due to HD3 falling near DC.
Figure 5-461 TX Single Tone HD3 vs Frequency and Digital Level at 3.5 GHz
GUID-A603C7B5-F10C-4458-BEDF-784F5B5511CF-low.gif
Matching at 3.5 GHz, fDAC = 11.79648GSPS, interleave mode.
Figure 5-463 TX Single Tone (–1 dBFS) Output Spectrum at 3.5 GHz (±300 MHz)
GUID-022A1EB5-9F99-48DB-BDE9-7714D446194D-low.gif
Matching at 3.5 GHz, fDAC = 11.79648GSPS, interleave mode.
Figure 5-465 TX Single Tone (–6 dBFS) Output Spectrum at 3.5 GHz (±300 MHz)
GUID-0DEA5EF5-1386-4B4B-A15F-B4B66061E878-low.gif
Matching at 3.5 GHz, fDAC = 11.79648GSPS, interleave mode.
Figure 5-467 TX Single Tone (–12 dBFS) Output Spectrum at 3.5 GHz (±300 MHz)
GUID-20210708-CA0I-VT4S-CTTJ-KC2QFRDJDNQK-low.svg
Matching at 3.5 GHz, 50MHz tone spacing, fDAC = 12GSPS, non-interleave mode.
Figure 5-469 TX Dual Tone Output Spectrum at 3.75 GHz, -7dBFS each (±600 MHz)
GUID-20210708-CA0I-3JZC-FL9G-GJJ0TFHRCPTF-low.svg
Matching at 3.5 GHz, 50MHz tone spacing, fDAC = 12GSPS, non-interleave mode.
Figure 5-471 TX Dual Tone Output Spectrum at 3.75 GHz, -13dBFS each (±600 MHz)
GUID-20210708-CA0I-J92J-D9BL-8N6WBV7B6SQX-low.svg
Matching at 3.5 GHz, 50MHz tone spacing, fDAC = 12GSPS, non-interleave mode.
Figure 5-473 TX Dual Tone Output Spectrum at 3.75 GHz, -30dBFS each (±600 MHz)