SPRSP09B December 2017 – January 2019 AMIC120
Refer to the PDF data sheet for device specific package drawings
DDR_VREF is the reference voltage for the input buffers on the LPDDR2 memory as well as the device. DDR_VREF is intended to be half the LPDDR2 power supply voltage and is typically generated with a voltage divider connected to the VDDS_DDR power supply. It should be routed as a nominal 20-mil wide trace with 0.1-µF bypass capacitors near each device connection. Narrowing of DDR_VREF is allowed to accommodate routing congestion.