SLUS892D December   2009  – December 2019 BQ24610 , BQ24617


  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Schematic
  4. Revision History
  5. Description (continued)
  6. Device Comparison Table
  7. Pin Configuration and Functions
    1.     Pin Functions
  8. Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Typical Characteristics
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Battery Voltage Regulation
      2. 9.3.2  Battery Current Regulation
      3. 9.3.3  Input Adapter Current Regulation
      4. 9.3.4  Precharge
      5. 9.3.5  Charge Termination, Recharge, and Safety Timer
      6. 9.3.6  Power Up
      7. 9.3.7  Enable and Disable Charging
      8. 9.3.8  System Power Selector
      9. 9.3.9  Automatic Internal Soft-Start Charger Current
      10. 9.3.10 Converter Operation
      11. 9.3.11 Synchronous and Nonsynchronous Operation
      12. 9.3.12 Cycle-by-Cycle Charge Undercurrent Protection
      13. 9.3.13 Input Overvoltage Protection (ACOV)
      14. 9.3.14 Input Undervoltage Lockout (UVLO)
      15. 9.3.15 Battery Overvoltage Protection
      16. 9.3.16 Cycle-by-Cycle Charge Overcurrent Protection
      17. 9.3.17 Thermal Shutdown Protection
      18. 9.3.18 Temperature Qualification
      19. 9.3.19 Timer Fault Recovery
      20. 9.3.20 PG Output
      21. 9.3.21 CE (Charge Enable)
      22. 9.3.22 Charge Status Outputs
      23. 9.3.23 Battery Detection
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 System with Power Path
        1. Design Requirements
        2. Detailed Design Procedure
          1. Inductor Selection
          2. Input Capacitor
          3. Output Capacitor
          4. Power MOSFETs Selection
          5. Input Filter Design
          6. Inductor, Capacitor, and Sense Resistor Selection Guidelines
        3. Application Curves
      2. 10.2.2 Simplified System without Power Path or DPM
        1. Design Requirements
        2. Detailed Design Procedure
        3. Application Curves
      3. 10.2.3 Lead-Acid Charging System
        1. Design Requirements
        2. Detailed Design Procedure
        3. Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Related Links
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Support Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

System Power Selector

The BQ2461x automatically switches adapter or battery power to the system load. The battery is connected to the system by default during power up or during SLEEP mode. The battery is disconnected from the system and then the adapter is connected to the system 30 ms after exiting SLEEP. An automatic break-before-make logic prevents shoot-through currents when the selectors switch.

The ACDRV is used to drive a pair of back-to-back P-channel power MOSFETs between the adapter and ACP with sources connected together and to VCC. The FET connected to the adapter prevents reverse discharge from the battery to the adapter when turned off. The P-channel FET with the drain connected to the adapter input provides reverse battery discharge protection when off; and also minimizes system power dissipation with its low rDS(on), compared to a Schottky diode. The other P-channel FET connected to ACP separates the battery from the adapter, and provides a limited dI/dt when connecting the adapter to the system by controlling the FET turnon time. The BATDRV controls a P-channel power MOSFET placed between BAT and the system.

When the adapter is not detected, ACDRV is pulled to VCC to keep ACFET off, disconnecting the adapter from system. BATDRV stays at ACN-6V to connect the battery to the system.

Approximately 30 ms after the device comes out of SLEEP mode, the system begins to switch from the battery to the adapter. The break-before-make logic keeps both ACFET and BATFET off for 10 µs before ACFET turns on. This prevents shoot-through current or any large discharging current from going into the battery. BATDRV is pulled up to ACN and the ACDRV pin is set to VCC-6V by an internal regulator to turn on P-channel ACFET, connecting the adapter to the system.

When the adapter is removed, the system waits until VCC drops back to within 200 mV above SRN to switch from the adapter back to the battery. The break-before-make logic still keeps 10 μs dead time. The ACDRV is pulled up to VCC and the BATDRV pin is set to ACN-6V by an internal regulator to turn on P-channel BATFET, connecting the battery to the system.

Asymmetrical gate drive (fast turnoff and slow turnon) for the ACDRV and BATDRV drivers provides fast turnoff and slow turnon of the ACFET and BATFET to help the break-before-make logic and to allow a soft start at turnon of either FET. The soft-start time can be further increased by putting a capacitor from gate to source of the P-channel power MOSFETs.