SLUSFR7 August   2025 BQ24810

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Device Power Up
        1. 6.3.1.1 Battery Only
        2. 6.3.1.2 Adapter Detect and ACOK Output
          1. 6.3.1.2.1 Adapter Overvoltage (ACOV)
        3. 6.3.1.3 REGN LDO
      2. 6.3.2 System Power Selection
      3. 6.3.3 Current and Power Monitor
        1. 6.3.3.1 High Accuracy Current Sense Amplifier (IADP and IDCHG)
        2. 6.3.3.2 High Accuracy Power Sense Amplifier (PMON)
      4. 6.3.4 Processor Hot Indication for CPU Throttling
      5. 6.3.5 Input Current Dynamic Power Management
        1. 6.3.5.1 Setting Input Current Limit
      6. 6.3.6 Two-Level Adapter Current Limit (Peak Power Mode)
      7. 6.3.7 EMI Switching Frequency Adjust
      8. 6.3.8 Device Protections Features
        1. 6.3.8.1 Charger Timeout
        2. 6.3.8.2 Input Overcurrent Protection (ACOC)
        3. 6.3.8.3 Charge Overcurrent Protection (CHG_OCP)
        4. 6.3.8.4 Battery Overvoltage Protection (BATOVP)
        5. 6.3.8.5 Battery Short
        6. 6.3.8.6 Thermal Shutdown Protection (TSHUT)
        7. 6.3.8.7 Inductor Short, MOSFET Short Protection
    4. 6.4 Device Functional Modes
      1. 6.4.1 Battery Charging in Buck Mode
        1. 6.4.1.1 Setting the Charge Current
        2. 6.4.1.2 Setting the Charge Voltage
        3. 6.4.1.3 Automatic Internal Soft-Start Charger Current
      2. 6.4.2 Hybrid Power Boost Mode
      3. 6.4.3 Battery Only Boost Mode
        1. 6.4.3.1 Setting AC_PLUG_EXIT_DEG in Battery Only Boost Mode
        2. 6.4.3.2 Setting Minimum System Voltage in Battery Only Boost Mode
      4. 6.4.4 Battery Discharge Current Regulation in Hybrid Boost Mode and Battery Only Boost Mode
      5. 6.4.5 Battery LEARN Cycle
      6. 6.4.6 Converter Operational Modes
        1. 6.4.6.1 Continuous Conduction Mode (CCM)
        2. 6.4.6.2 Discontinuous Conduction Mode (DCM)
        3. 6.4.6.3 Non-Sync Mode and Light Load Comparator
    5. 6.5 Programming
      1. 6.5.1 SMBus Interface
        1. 6.5.1.1 SMBus Write-Word and Read-Word Protocols
        2. 6.5.1.2 Timing Diagrams
    6. 6.6 Register Maps
      1. 6.6.1  Battery-Charger Commands
      2. 6.6.2  Setting Charger Options
        1. 6.6.2.1 ChargeOption0 Register
      3. 6.6.3  ChargeOption1 Register
      4. 6.6.4  ChargeOption2 Register
      5. 6.6.5  ChargeOption3 Register
      6. 6.6.6  ChargeOption4 Register
      7. 6.6.7  ProchotOption0 Register
      8. 6.6.8  ProchotOption1 Register
      9. 6.6.9  ProchotStatus Register
      10. 6.6.10 Charge Current Register
      11. 6.6.11 Charge Voltage Register
      12. 6.6.12 Discharge Current Register
      13. 6.6.13 Minimum System Voltage Register
      14. 6.6.14 Input Current Register
      15. 6.6.15 Register Exceptions
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Typical System Schematic
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1  Adapter Current Sense Filter
          2. 7.2.1.2.2  Negative Output Voltage Protection
          3. 7.2.1.2.3  Reverse Input Voltage Protection
          4. 7.2.1.2.4  Reduce Battery Quiescent Current
          5. 7.2.1.2.5  CIN Capacitance
          6. 7.2.1.2.6  L1 Inductor Selection
          7. 7.2.1.2.7  CBATT Capacitance
          8. 7.2.1.2.8  Buck Charging Internal Compensation
          9. 7.2.1.2.9  CSYS Capacitance
          10. 7.2.1.2.10 Battery Only Boost Internal Compensation
          11. 7.2.1.2.11 Power MOSFETs Selection
          12. 7.2.1.2.12 Input Filter Design
        3. 7.2.1.3 Application Curves
      2. 7.2.2 Migration from Previous Devices (Does Not Support Battery Only Boost)
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
          1. 7.2.2.2.1 CSYS Capacitance
        3. 7.2.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Examples
        1. 7.4.2.1 Layout Consideration of Current Path
        2. 7.4.2.2 Layout Consideration of Short Circuit Protection
        3. 7.4.2.3 Layout Consideration for Short Circuit Protection
  9. 8 Device and Documentation Support
    1. 8.1 Third-Party Products Disclaimer
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RUY|28
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.5 Electrical Characteristics

VVBUS_UVLOZ < VVBUS < VVBUS_OV and VVBUS > VBAT + VSLEEP, TJ = -40°C to +125°C, and TJ = 25°C for typical values (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
QUIESCENT CURRENTS
IQ_BAT Current with battery only (TJ=0-85C), (SRP, SRN, BATSRC, PHASE, VCC, ACP, ACN) VBAT = 16.8V, VCC disconnected to battery, REG0x12[15]=1 5 µA
VBAT = 16.8V, VCC connected to battery, REG0x12[15]=1 25 44 µA
VBAT = 16.8V, VCC connect to battery, BATFET on, REG0x12[15]=0, REGN on, Comparator and /PROCHOT enabled, PMON and boost mode disabled 700 800 µA
VBAT = 16.8V, VCC connect to battery, BATFET on, REG0x12[15]=0, REGN on, Comparator, /PROCHOT and PMON enabled, boost mode disabled 1100 1200 µA
VBAT = 13.5V, VCC connect to battery, BATFET on, REG0x12[15]=0, REGN on, Comparator, /PROCHOT, PMON and boost mode enabled, but not switching. 1.8 mA
IQ_VBUS Quiescent input current (VBUS) VVCC_ULVO<VVCC<VACOVP, VACDET> 2.4V, charge disabled 0.65 0.80 mA
VVCC_ULVO<VVCC<VACOVP, VACDET >2.4V, charge enabled, no switching 1.60 3.00 mA
VVCC_ULVO<VVCC<VACOVP, VACDET >2.4V, charge enabled, switching, MOSFET Qg 4nC 10 mA
REGN LDO
VREGN_REG REGN Regulator Voltage VVCC =10V, VACDET>Vwakeup_RISE 5.7 6.0 6.3 V
IREGN_LIM REGN Current Limit VREGN = 4.0V, VVCC > VUVLO, in charging mode 80 100 mA
VREGN = 4.0V, VVCC > VUVLO, Not in charging mode 13 mA
VREGN_DROPOUT REGN Output Voltage Dropout VVCC = 5V, ILOAD=20mA 4.4 4.6 4.75 V
IREGN_TSHUT REGN Output under thermal shutdown VREGN=5V 13 23 mA
CREGN REGN Output Capacitor ILOAD = 100uA to 50mA 2 µF
VCC / VBAT SUPPLY
VVBUS_OP VBUS operating range 4.5 24 V
VVCC_UVLOZ_RISE Input Undervoltage Rising Threshold VVCC rising 2.4 2.6 2.8 V
VVCC_UVLOZ_FALL Input Undervoltage Falling Threshold VVCC falling 2.2 2.4 2.6 V
VVCC_UVLOZ_HYS Input Undervoltage Falling Hysteresis VVCC falling 200 mV
VSLEEP_FALL Sleep Falling Threshold to turnoff ACFET VCC ramps down to SRN –40 25 100 mV
VSLEEP_RISE Sleep Rising Threshold to turnon ACFET VCC ramps up above SRN 280 400 520 mV
VWAKEUP_RISE WAKEUP Detect Rising Threshold VVCC>VVCC_UVLOZ, ACDET ramps up 0.57 0.80 V
VWAKEUP_FALL WAKEUP Detect Falling Threshold VVCC>VVCC_UVLOZ, ACDET ramps down 0.3 0.51 V
VACOK_RISE ACOK Rising Threshold VVCC>VVCC_UVLOZ, ACDET ramps up 2.375 2.4 2.43 V
VACOK_FALL ACOK Falling Threshold VVCC>VVCC_UVLOZ, ACDET ramps down 2.3 2.345 2.40 V
VACOV_RISE VCC Overvoltage Rising Threshold VCC ramps up 24 26 28 V
VACOV_FALL VCC Overvoltage Falling Threshold VCC ramps down 22 25 27 V
VACNSRN_FALL ACN to BAT Falling Threshold to turn on BATFET ACN ramps down towards SRN 120 200 280 mV
VACNSRN_RISE ACN to BAT Rising Threshold to turn off BATFET ACN ramps above SRN 220 290 360 mV
VBATDEPL_FALL Battery Depletion Falling Threshold, as percentage of voltage regulation limit. Exit boost mode and learn mode. REG0x3B[15:14]=00 56 60 64 %
REG0x3B[15:14]=01 60 65 68 %
REG0x3B[15:14]=10 64 68 72 %
REG0x3B[15:14]=11 68 72 78 %
VBATDEPL_RISE Battery Depletion Rising Hysteresis REG0x3B[15:14]=00 285 370 500 mV
REG0x3B[15:14]=01 300 390 530 mV
REG0x3B[15:14]=10 320 420 565 mV
REG0x3B[15:14]=11 340 445 600 mV
VBATLOWV_FALL Battery LOWV Falling Threshold SRN ramps down 2.3 2.5 2.8 V
VBATLOWV_RISE Battery LOWV Rising Threshold SRN ramps up 2.7 V
IBATLOWV Battery LOWV charge current limit RSR = 10 mΩ 500 mA
ACFET/RBFET and BATFET DRIVERS
IACFET ACDRV Charge Pump Current Limit(BQ24810) VACDRV-VCMSRC=4.5V 32.5 60 µA
VDRV_ACFET Gate Drive Voltage on ACFET with no load (BQ24810) VACDRV-VCMSRC when VVCC>VUVLO 5.7 6.1 6.5 V
RACDRV_OFF ACDRV Turnoff Resistance(BQ24810) 9.0 9.7 10.4 kΩ
IBATFET BATDRV Charge Pump Current Limit VBATDRV-VBATSRC=5V 40 60 µA
VDRV_BATFET Gate Drive Voltage on BATFET VBATDRV-VBATSRC when VSRN>VBAT_UVLO 5.5 6.1 6.8 V
RBATDRV_OFF BATDRV Turnoff Resistance 5 6.2 7.4 kΩ
RBATDRV_LOAD Minimum Load between gate and source 500 kΩ
BATTERY CHARGER
VREG_RANGE Typical charge voltage regulation range 1.024 19.2 V
VREG_STEP Typical charge voltage step 16 mV
VREG_ACC Charge voltage accuracy ChargeVoltage() = 0x41A0 16.800 V
-10C-85C –0.4 0.4 %
-40C-125C –0.5 0.5 %
ChargeVoltage() = 0x3130 12.592 V
-10C-85C –0.4 0.4 %
-40C-125C –0.5 0.5 %
ChargeVoltage() = 0x20D0 8.400 V
-10C-85C –0.4 0.4 %
-40C-125C –0.6 0.6 %
ChargeVoltage() = 0x1060 4.192 V
-10C-85C –0.5 0.8 %
-40C-125C –0.7 0.8 %
ICHG_RANGE Typical charge current regulation range RSR = 10 mΩ 0 8128 mA
ICHG_STEP Typical charge current regulation step RSR = 10 mΩ 64 mA
ICHG_ACC Charge Current Regulation Accuracy (SRN>2V, RSR = 10 mΩ，-40℃-85℃) ChargeCurrent() = 0x1000 4096 mA
–2 2 %
ChargeCurrent() = 0x0800 2048 mA
–3 3 %
ChargeCurrent() = 0x0400 1024 mA
-5 5 %
ChargeCurrent() = 0x0200 512 mA
–10 10 %
ChargeCurrent() = 0x0100 256 mA
ChargeVoltage() = 0x20D0, 0x3031, 0x41A0 –16 16 %
ChargeVoltage() = 0x1060 –20 20 %
ChargeCurrent() = 0x00C0 192 mA
–20 20 %
ChargeCurrent() = 0x0080 128 mA
–30 30 %
ILEAK_SRP-SRN SRP and SRN Leakage Mismatch –8 8 µA
INPUT CURRENT REGULATION
ILIM1_RANGE Typical input current regulation range RAC = 10 mΩ 0 10560 mA
ILIM1_STEP Typical Input Current Regulation Step RAC = 10 mΩ 64 mA
ILIM1_ACC Input Current Regulation Accuracy (0-85℃) RAC = 10 mΩ, InputCurrent() = 0x1000 4096 mA
–2 2 %
RAC = 10 mΩ, InputCurrent() = 0x0800 2048 mA
–3 3 %
RAC = 10 mΩ, InputCurrent() = 0x0400 1024 mA
–5 5 %
ILEAK_ACP-ACN ACP and ACN Leakage Mismatch –5 5 µA
PEAK POWER MODE
TOVLD Peak Power Overload Period REG0x38[15:14]= 00 0.59 1.00 mS
REG0x38[15:14]= 01 1.3 2.0 mS
REG0x38[15:14]= 10 3.1 5.0 mS
REG0x38[15:14]= 11 7.0 10.1 mS
TMAX Peak Power Cycle Period REG0x38[9:8]= 00 17.0 20 23.4 mS
REG0x38[9:8]= 01 34 40 46 mS
REG0x38[9:8]= 10 68 80 92 mS
REG0x38[9:8]= 11 935 1100 1265 mS
ILIM2_ACC Peak Current Limit Accuracy InputCurrent() = 0x1000, REG0x3C[14:11]=1001 6144 mA
97 101 %
InputCurrent() = 0x0800, REG0x3C[14:11]=1001 3072 mA
96 102 %
InputCurrent() = 0x0400, REG0x3C[14:11]=1001 1536 mA
98 109 %
InputCurrent() = 0x0200, REG0x3C[14:11]=1001 768 mA
94 107 114 %
BATTERY DISCHARGE CURRENT REGULATION (HYBRID POWER BOOST MODE)
VIDCHG_RNG DIscharge Current Regulation Range RSR = 10 mΩ 0 32256 mA
IIDCHG_STEP Discahrge Current Regulation Step RSR = 10 mΩ 512 mA
IDCHG_ACC Discharge Current Regulation Accuracy(-40℃-85℃) DischargeCurrent() = 0x2000 8192 mA
–2 2 %
DischargeCurrent() = 0x1000 4096 mA
–3 3 %
DischargeCurrent() = 0x0800 2048 mA
–5 5 %
DischargeCurrent() = 0x0400 1024 mA
–8 8 %
DischargeCurrent() = 0x0200 512 mA
–10 10 %
BATTERY ONLY BOOST MODE
VSYSMIN_RNG Minimum System Voltage Range (System Voltage Regulation is 1.5 or 2.3V higher) 5.632 16.128 V
VSYSMIN_STEP Typical System Voltage Regulation Step 256 mV
VSYSMIN_ACC System Voltage Regulation Accuracy VSYSMIN() = 0x2600 9.728 V
–2.2 2.8 %
VSYSMIN() = 0x1980 6.656 V
–2.2 2.8 %
VSYSMIN_ENTER System Voltage Falling Threshold to enter Battery Boost As percentage of VSYSMIN 100 %
CURRENT SENSE AMPLIFIER
VIADP IADP Output Voltage Range 0 3.3 V
IIADP IADP Output Current 1 mA
AIADP IADP Sense Amplifier Gain VIADP / (VACP- VACN), REG0x12[4]=0 20 V/V
VIADP_ACC Current Sense Amplifier Gain Accuracy VACP-VACN = 40mV –2 2 %
VACP-VACN = 20mV –4 4 %
VACP-VACN = 10mV –7 7 %
VACP-VACN = 5mV –20 20 %
VACP-VACN = 2.5mV –30 30 %
VACP-VACN = 1.5mV –40 40 %
VIADP_CLAMP IADP Clamp Voltage 3 3.3 V
CIADP IADP Output Load Capacitance With 0 to 1mA load 100 pF
VIDCHG IDCHG Output Voltage Range 0 3.3 V
IIDCHG IDCHG Output Current 0 1 mA
AIDCHG Current Sense Amplifier Gain VIDCHG / (VSRN-VSRP), REG0x12[3]=1 16 V/V
VIDCHG_ACC Current Sense Output Accuracy VSRN-VSRP = 40mV –5 5 %
VSRN-VSRP = 20mV –9 9 %
VSRN-VSRP = 10mV –17 17 %
VSRN-VSRP = 5mV –34 34 %
VIDCHG_CLAMP IDCHG Clamp Voltage 3 3.3 V
CIDCHG IDCHG Output Load Capacitance With 0 to 1mA load 100 pF
VPMON PMON Output Voltage Range 0 3.3 V
IPMON PMON Output Current 0 100 µA
APMON PMON System Gain IPMON / (PIN+ PBAT), REG0x3B[9]=1 1 µA/W
VPMON_ACC PMON Gain Accuracy (REG0x3B[9]=1) Adapter Only with System Power = 19.5V/45W –4 4 %
Adapter Only with System Power = 12V/24W –6 6 %
Adapter Only with System Power = 5V/9W –10 10 %
Battery Only with System Power 11V/44W –4.5 4.5 %
Battery Only with System Power 7.4V/29.8W –7 7 %
Battery Only with System Power 3.7V/14.4W –10 10 %
VPMON_CLAMP PMON Clamp Voltage 3 3.3 V
INPUT OVER-CURRENT PROTECTION
VACOC Rising Threshold w.r.t. ILIM2 current limit REG0x37[9]=1 190 200 215 %
VACOC_CLAMP ACOC Threshold Clamp Low Value VACP-VACN 50 mV
VACOC_CLAMP ACOC Threshold Clamp High Value VACP-VACN 190 mV
BATTERY OVER-VOLTAGE PROTECTION
VBAT_OVP Overvoltage Rising Threshold as percentage of VBAT_REG SRN ramps up 103 104 105 %
Overvoltage Falling Threshold as percentage of VBAT_REG SRN ramps down 101 102 103 %
IBAT_OVP Discharge Resistor on SRP VSRN>6V 6 mA
VSRN=4.5V 2 mA
CONVERTER PROTECTION
VOCP_LIMIT Cycle by cycle Over-Current Limit, measured voltage between SRP and SRN. ChargeCurrent()=0x0xxxH 54 60 66 mV
ChargeCurrent()=0x1000H-0x17C0H 80 90 100 mV
ChargeCurrent()=0x1800H-0x1FC0H 110 120 130 mV
VUCP_FALL Cycle by cycle Under-Current Falling Threshold SRP ramps down towards SRN 1.0 5 9.00 mV
VLL_FALL_BUCK Light Load Falling Threshold in Buck Mode SRP ramps down towards SRN 1.25 mV
VLL_RISE_BUCK Light Load Rising Threshold in Buck Mode SRP ramps above SRN 2.5 mV
VLL_FALL_BOOST Light Load Falling Threshold in Boost Mode SRN ramps down towards SRP 2.5 mV
VLL_RISE_BOOST Light Load Rising Threshold in Boost Mode SRN ramps above SRP 5.0 mV
INDUCTOR SHORT, MOSFET SHORT PROTECTION
VIFAULT_HI_RISE ACN to PH Rising Threshold REG0x37[7] = 0 450 750 1200 mV
VIFAULT_LO_RISE PH to GND Rising Threshold REG0x37[6] = 1 165 250 340 mV
SWITCHING CONVERTER
FSW PWM switching frequency REG0x12[9:8] = 00 510 600 690 KHz
REG0x12[9:8] = 01 680 800 920 KHz
REG0x12[9:8] = 10 255 300 345 KHz
REG0x12[9:8] = 11 340 400 460 KHz
RDS_HI_ON High-side Driver (HSD) Turnon Resistance VBTST – VPH = 5.5 V 1.72 Ω
RDS_HI_OFF High-side Driver Turnoff Resistance VBTST – VPH = 5.5 V 0.59 Ω
VBTST_REFRESH Bootstrap refresh comparator threshold VBTST – VPH when LSFET refresh pulse is requested, VBUS = 5V 3.85 4.3 4.7 V
RDS_LO_ON Low-side Driver (LSD) Turnon Resistance 4.5 Ω
RDS_LO_OFF Low-side Driver Turnoff Resistance 0.51 Ω
ISTEP Soft-start Step Size 64 mA
tSTEP Soft-start Step Time 400 us
THERMAL SHUTDOWN
TSHUT_RISE Thermal Shutdown Rising threshold Temperature Increasing 155 °C
TSHUT_FALL Thermal Shutdown Falling threshold Temperature Decreasing 135 °C
PROCHOT COMPARATORS
VICRIT ICRIT comparator threshold REG0x3C[14:11]=1001, as percentage of input current limit 4096mA 161 165 168 %
VINOM INOM Comparator Threshold as percentage of input current limit 4096mA, 0x3F()=0x1000, 0x3C [0] = 0 107 110 112 %
as percentage of input current limit 4096mA, 0x3F()=0x1000, 0x3C [0] = 1 104 106 108 %
VIDCHG IDCHG comparator threshold REG0x3D[15:11]=10000, as voltage between SRN and SRP 160 163.84 167 mV
REG0x3D[15:11]=00100, as voltage between SRN and SRP 38 40.96 44 mV
VVBATT VBATT Comparator Threshold (-40℃-85℃) REG0x3C[7:6]=00 5.71 5.75 5.95 V
REG0x3C[7:6]=01 5.88 6.00 6.12 V
REG0x3C[7:6]=10 6.22 6.25 6.46 V
REG0x3C[7:6]=11 6.48 6.50 6.72 V
MISC COMPARATORS
VCMP_OS Independent comparator Input Offset –4 4 mV
VCMP_CM Independent comparator Input Common-mode 0 6.5 V
VCMP_REF Independent comparator Reference Voltage (CMPIN falling) REG0x3B[7]=0 2.27 2.3 2.32 V
REG0x3B[7]=1 1.17 1.2 1.22 V
VCMP_RISE_HYST Independent comparator Reference Hysteresis REG0x3B[6]=0 100 mV
VILIM_FALL ILIM as Converter Enable Falling Threshold VILIM falling 60 75 90 mV
VILIM_RISE ILIM as Converter Enable Rising Threshold VILIM rising 90 105 120 mV
ANALOG AND DIGITAL I/O
IAIN_ LEAK Input bias current V = 7V –1 1 µA
VIN_ LO Input high threshold (SDA, SCL) SDA and SCL pins 0.8 V
VIN_ HI Input low threshold (SDA, SCL) SDA and SCL pins 2.1 V
IDIN_ LEAK Input bias current (SDA, SCL) V = 7V, SDA and SCL pins –1 1 µA
VOUT_LO Output Saturation Voltage (ACOK, SDA, CMPOUT, /BST_STAT) 5 mA drain current 500 mV
IOUT_LEAK Leakage Current (ACOK, SDA, CMPOUT, /BST_STAT) V = 7V –1 1 uA
VOUT_LO_PH Output Saturation Voltage (/PROCHOT) 17mA drain current 300 mV
IOUT_LEAK_PH Leakage Current (/PROCHOT) V = 5.5V –1 1 uA