SLVSDU0B September 2017 – September 2019 BQ25910
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
REG08 is shown in Figure 39 and described in Table 13.
Return to Summary Table.
When the watchdog timer expires (WD_STAT = 1h), the VBUS_OVP_STAT, TSHUT_STAT, BATOVP_STAT, and CFLY_STAT bits are held in reset until the watchdog fault is cleared (WD_RST bit = 1h, or changing the WATCHDOG[1:0] bits).
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
VBUS_OVP_STAT | TSHUT_STAT | BATOVP_STAT | CFLY_STAT | RESERVED | CAP_COND_STAT | POORSRC_STAT | RESERVED |
R-X | R-X | R-X | R-X | R-0h | R-X | R-X | R-0h |
Bit | Field | Type | Reset by REG_RST | Reset by WATCHDOG | Description |
---|---|---|---|---|---|
7 | VBUS_OVP_STAT | R | Yes | Yes |
Input-overvoltage status 0h = Normal 1h = Device in overvoltage protection |
6 | TSHUT_STAT | R | Yes | Yes |
Device temperature-shutdown status 0h = Normal 1h = Device in thermal-shutdown protection |
5 | BATOVP_STAT | R | Yes | Yes |
Battery overvoltage status 0h = Normal 1h = BATOVP (VBAT > VBATOVP) |
4 | CFLY_STAT | R | Yes | Yes |
Flying capacitor status 0h = Normal 1h = Flying capacitor fault (VCFLY_UVP or OVP) |
3 | Reserved | R | Yes | Yes | Reserved bit always reads 0 |
2 | CAP_COND_STAT | R | Yes | Yes |
Capacitor precondition status 0h = Normal 1h = CFLY or CAUX precondition failed |
1 | POORSRC_STAT | R | Yes | Yes |
Poor-source-detection status 0h = Normal 1h = POORSRC routine failed 7 consecutive times |
0 | RESERVED | R | Yes | Yes |
Reserved bit always reads 0 |