SWRS255A March 2022 – April 2025 CC1311P3
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| Core Current Consumption | ||||||
| Icore | Reset and Shutdown | Reset. RESET_N pin asserted or VDDS below power-on-reset threshold | 115 | nA | ||
| Shutdown. No clocks running, no retention | 115 | |||||
| Standby without cache retention |
RTC running, CPU, 32KB RAM and (partial) register retention. RCOSC_LF |
0.7 | µA | |||
| RTC running, CPU, 32KB RAM and (partial) register retention XOSC_LF |
0.8 | µA | ||||
| Standby with cache retention |
RTC running, CPU, 32KB RAM and (partial) register retention. RCOSC_LF |
2.1 | µA | |||
| RTC running, CPU, 32KB RAM and (partial) register retention. XOSC_LF |
2.2 | µA | ||||
| Idle | Supply Systems and RAM powered RCOSC_HF |
570 | µA | |||
| Active | MCU running CoreMark at 48 MHz RCOSC_HF |
2.50 | mA | |||
| Peripheral Current Consumption | ||||||
| Iperi | Peripheral power domain | Delta current with domain enabled | 47.0 | µA | ||
| Serial power domain | Delta current with domain enabled | 3.3 | ||||
| RF Core | Delta current with power domain enabled, clock enabled, RF core idle |
122 | ||||
| µDMA | Delta current with clock enabled, module is idle | 58.1 | ||||
| Timers | Delta current with clock enabled, module is idle(1) | 87.0 | ||||
| I2C | Delta current with clock enabled, module is idle | 11.6 | ||||
| I2S | Delta current with clock enabled, module is idle | 25.8 | ||||
| SSI | Delta current with clock enabled, module is idle | 61.3 | ||||
| UART | Delta current with clock enabled, module is idle | 125 | ||||
| CRYPTO (AES) | Delta current with clock enabled, module is idle | 25.2 | ||||
| TRNG | Delta current with clock enabled, module is idle | 23.3 | ||||