SWRS243B February   2020  – May 2021 CC3235MODAS , CC3235MODASF , CC3235MODS , CC3235MODSF

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Functional Block Diagrams
  5. Revision History
  6. Device Comparison
    1. 6.1 Related Products
  7. Terminal Configuration and Functions
    1. 7.1 CC3235MODx and CC3235MODAx Pin Diagram
    2. 7.2 Pin Attributes and Pin Multiplexing
      1. 7.2.1 Module Pin Descriptions
    3. 7.3 Signal Descriptions
    4. 7.4 Drive Strength and Reset States for Analog-Digital Multiplexed Pins
    5. 7.5 Pad State After Application of Power to Chip, but Before Reset Release
    6. 7.6 Connections for Unused Pins
  8. Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Current Consumption (CC3235MODS and CC3235MODAS)
      1.     
      2.     
    5. 8.5  Current Consumption (CC3235MODSF and CC3235MODASF)
      1.     
      2.     
    6. 8.6  TX Power Control for 2.4 GHz Band
    7. 8.7  TX Power Control for 5 GHz
    8. 8.8  Brownout and Blackout Conditions
    9. 8.9  Electrical Characteristics for GPIO Pins
      1. 8.9.1 Electrical Characteristics for Pin Internal Pullup and Pulldown (25°C)
    10. 8.10 CC3235MODAx Antenna Characteristics
    11. 8.11 WLAN Receiver Characteristics
      1.     
      2.     
    12. 8.12 WLAN Transmitter Characteristics
      1.     
      2.     
    13. 8.13 BLE and WLAN Coexistence Requirements
    14. 8.14 Reset Requirement
    15. 8.15 Thermal Resistance Characteristics for MOB and MON Packages
    16. 8.16 Timing and Switching Characteristics
      1. 8.16.1 Power-Up Sequencing
      2. 8.16.2 Power-Down Sequencing
      3. 8.16.3 Device Reset
      4. 8.16.4 Wake Up From Hibernate Timing
      5. 8.16.5 Peripherals Timing
        1. 8.16.5.1  SPI
          1. 8.16.5.1.1 SPI Master
          2. 8.16.5.1.2 SPI Slave
        2. 8.16.5.2  I2S
          1. 8.16.5.2.1 I2S Transmit Mode
          2. 8.16.5.2.2 I2S Receive Mode
        3. 8.16.5.3  GPIOs
          1. 8.16.5.3.1 GPIO Input Transition Time Parameters
        4. 8.16.5.4  I2C
        5. 8.16.5.5  IEEE 1149.1 JTAG
        6. 8.16.5.6  ADC
        7. 8.16.5.7  Camera Parallel Port
        8. 8.16.5.8  UART
        9. 8.16.5.9  External Flash Interface
        10. 8.16.5.10 SD Host
        11. 8.16.5.11 Timers
  9. Detailed Description
    1. 9.1  Overview
    2. 9.2  Functional Block Diagram
    3. 9.3  Arm Cortex-M4 Processor Core Subsystem
    4. 9.4  Wi-Fi Network Processor Subsystem
      1. 9.4.1 WLAN
      2. 9.4.2 Network Stack
    5. 9.5  Security
    6. 9.6  FIPS 140-2 Level 1 Certification
    7. 9.7  Power-Management Subsystem
      1. 9.7.1 VBAT Wide-Voltage Connection
    8. 9.8  Low-Power Operating Mode
    9. 9.9  Memory
      1. 9.9.1 Internal Memory
        1. 9.9.1.1 SRAM
        2. 9.9.1.2 ROM
        3. 9.9.1.3 Flash Memory
        4. 9.9.1.4 Memory Map
    10. 9.10 Restoring Factory Default Configuration
    11. 9.11 Boot Modes
      1. 9.11.1 Boot Mode List
    12. 9.12 Hostless Mode
    13. 9.13 Device Certification and Qualification
      1. 9.13.1 FCC Certification and Statement
      2. 9.13.2 IC/ISED Certification and Statement
      3. 9.13.3 ETSI/CE Certification
      4. 9.13.4 MIC Certification
    14. 9.14 Module Markings
    15. 9.15 End Product Labeling
    16. 9.16 Manual Information to the End User
  10. 10Applications, Implementation, and Layout
    1. 10.1 Typical Application
      1. 10.1.1 BLE/2.4 GHz Radio Coexistence
      2. 10.1.2 Antenna Selection (CC3235MODx only)
      3. 10.1.3 Typical Application Schematic (CC3235MODx)
      4. 10.1.4 Typical Application Schematic (CC3235MODAx)
    2. 10.2 Device Connection and Layout Fundamentals
      1. 10.2.1 Power Supply Decoupling and Bulk Capacitors
      2. 10.2.2 Reset
      3. 10.2.3 Unused Pins
    3. 10.3 PCB Layout Guidelines
      1. 10.3.1 General Layout Recommendations
      2. 10.3.2 CC3235MODx RF Layout Recommendations
        1. 10.3.2.1 Antenna Placement and Routing
        2. 10.3.2.2 Transmission Line Considerations
      3. 10.3.3 CC3235MODAx RF Layout Recommendations
  11. 11Environmental Requirements and SMT Specifications
    1. 11.1 PCB Bending
    2. 11.2 Handling Environment
      1. 11.2.1 Terminals
      2. 11.2.2 Falling
    3. 11.3 Storage Condition
      1. 11.3.1 Moisture Barrier Bag Before Opened
      2. 11.3.2 Moisture Barrier Bag Open
    4. 11.4 PCB Assembly Guide
      1. 11.4.1 PCB Land Pattern & Thermal Vias
      2. 11.4.2 SMT Assembly Recommendations
      3. 11.4.3 PCB Surface Finish Requirements
      4. 11.4.4 Solder Stencil
      5. 11.4.5 Package Placement
      6. 11.4.6 Solder Joint Inspection
      7. 11.4.7 Rework and Replacement
      8. 11.4.8 Solder Joint Voiding
    5. 11.5 Baking Conditions
    6. 11.6 Soldering and Reflow Condition
  12. 12Device and Documentation Support
    1. 12.1 Development Tools and Software
    2. 12.2 Firmware Updates
    3. 12.3 Device Nomenclature
    4. 12.4 Documentation Support
    5. 12.5 Related Links
    6. 12.6 Support Resources
    7. 12.7 Trademarks
    8. 12.8 Electrostatic Discharge Caution
    9. 12.9 Glossary
  13. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Mechanical, Land, and Solder Paste Drawings
    2. 13.2 Package Option Addendum
      1. 13.2.1 Packaging Information
      2. 13.2.2 Tape and Reel Information
      3. 13.2.3 CC3235MODx Tape Specifications
      4. 13.2.4 CC3235MODAx Tape Specifications

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • MON|63
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Boot Mode List

The CC3235MODx and CC3235MODAx MCU implements a sense-on-power (SoP) scheme to determine the device operation mode.

SoP values are sensed from the module pin during power up. This encoding determines the boot flow. Before the device is taken out of reset, the SoP values are copied to a register and used to determine the device operation mode while powering up. These values determine the boot flow as well as the default mapping for some of the pins (JTAG, SWD, UART0). Table 9-5 lists the pull configurations.

All CC3235MODx and CC3235MODAx MCUs contain internal pulldown resistors on the SOP[2:0] lines. The application can use SOP2 for other functions after chip has powered up. However, to avoid spurious SOP values from being sensed at power up, TI strongly recommends using the SOP2 pin only for output signals. The SOP0 and SOP1 pins are multiplexed with the WLAN analog test pins and are not available for other functions.

Table 9-5 CC3235MODx and CC3235MODAx Functional Configurations
NAMESOP[2]SOP[1]SOP[0]SoP MODECOMMENT
UARTLOADPullupPulldownPulldownLDfrUARTFactory, lab flash, and SRAM loads through the UART. The device waits indefinitely for the UART to load code. The SOP bits then must be toggled to configure the device in functional mode. Also puts JTAG in 4-wire mode.
FUNCTIONAL_2WJPulldownPulldownPullupFn2WJFunctional development mode. In this mode, 2-pin SWD is available to the developer. TMS and TCK are available for debugger connection.
FUNCTIONAL_4WJPulldownPulldownPulldownFn4WJFunctional development mode. In this mode, 4-pin JTAG is available to the developer. TDI, TMS, TCK, and TDO are available for debugger connection. The default configuration for CC3235MODx and CC3235MODAx MCUs.
UARTLOAD_FUNCTIONAL_4WJPulldownPullupPulldownLDfrUART_FnWJSupports flash and SRAM load through UART and functional mode. The MCU bootloader tries to detect a UART break on UART receive line. If the break signal is present, the device enters the UARTLOAD mode, otherwise, the device enters the functional mode. TDI, TMS, TCK, and TDO are available for debugger connection.
RET_FACTORY_IMAGEPulldownPullupPullupRetFactDefWhen module reset is toggled, the MCU bootloader kickstarts the procedure to restore factory default images.