DLPS048C March   2015  – June 2019 DLPC150

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      DLP 0.2-Inch WVGA Chipset
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
    2. 5.1 DLPC150 Mechanical Data
      1. Table 1. I/O Type Subscript Definition
      2. Table 2. Internal Pullup and Pulldown Characteristics
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics Over Recommended Operating Conditions
    6. 6.6  Electrical Characteristics
    7. 6.7  High-Speed Sub-LVDS Electrical Characteristics
    8. 6.8  Low-Speed SDR Electrical Characteristics
    9. 6.9  System Oscillators Timing Requirements
    10. 6.10 Power-Up and Reset Timing Requirements
    11. 6.11 Parallel Interface Frame Timing Requirements
    12. 6.12 Parallel Interface General Timing Requirements
    13. 6.13 Flash Interface Timing Requirements
  7. 7 Parameter Measurement Information
    1. 7.1 Host_irq Usage Model
    2. 7.2 Input Source
      1. 7.2.1 Parallel Interface Supports Two Data Transfer Formats
        1. 7.2.1.1 Pdata Bus – Parallel Interface Bit Mapping Modes
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Interface Timing Requirements
        1. 8.3.1.1 Parallel Interface
      2. 8.3.2 Serial Flash Interface
      3. 8.3.3 Serial Flash Programming
      4. 8.3.4 I2C Control Interface
      5. 8.3.5 DMD (Sub-LVDS) Interface
      6. 8.3.6 Calibration And Debug Support
      7. 8.3.7 DMD Interface Considerations
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 DLPC150 System Design Consideration – Application Notes
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 DLPC150 System Interfaces
          1. 9.2.2.1.1 Control Interface
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
    1. 10.1 System Power-Up and Power-Down Sequence
    2. 10.2 DLPC150 Power-Up Initialization Sequence
    3. 10.3 DMD Fast Park Control (PARKZ)
    4. 10.4 Hot Plug Usage
    5. 10.5 Maximum Signal Transition Time
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB Layout Guidelines For Internal Controller PLL Power
      2. 11.1.2 DLPC150 Reference Clock
        1. 11.1.2.1 Recommended Crystal Oscillator Configuration
      3. 11.1.3 General PCB Recommendations
      4. 11.1.4 General Handling Guidelines for Unused CMOS-Type Pins
      5. 11.1.5 Maximum Pin-to-Pin, PCB Interconnects Etch Lengths
      6. 11.1.6 Number of Layer Changes
      7. 11.1.7 Stubs
      8. 11.1.8 Terminations
      9. 11.1.9 Routing Vias
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Device Nomenclature
        1. 12.1.1.1 Device Markings
    2. 12.2 Related Links
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Package Option Addendum
      1. 13.1.1 Packaging Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)

6.9 System Oscillators Timing Requirements(3)

NUMBER MIN MAX UNIT
1a ƒclock Clock frequency, MOSC(1) Option 1: 24-MHz oscillator 23.998 24.002 MHz
1a tc Cycle time, MOSC(1) Option 1: 24-MHz oscillator 41.67 41.663 ns
1b ƒclock Clock frequency, MOSC(1) Option 2: 16-MHz oscillator 15.998 16.002 MHz
1b tc Cycle time, MOSC(1) Option 2: 16-MHz oscillator 62.508 62.492 ns
2 tw(H) Pulse duration(2), MOSC, high 50% to 50% reference points (signal) 40 tc%
3 tw(L) Pulse duration(2), MOSC, low 50% to 50% reference points (signal) 40 tc%
4 tt Transition time(2), MOSC, tt = tf / tr 20% to 80% reference points (signal) 10 ns
5 tjp Long-term, peak-to-peak, period jitter(2), MOSC
(that is the deviation in period from ideal period due solely to high frequency jitter)		 2%
(1) The frequency accuracy for MOSC is ±200 PPM. (This includes impact to accuracy due to aging, temperature, and trim sensitivity.) The MOSC input cannot support spread spectrum clock spreading.
(2) Applies only when driven through an external digital oscillator.
(3) The I/O pin TSTPT_6 enables the DLPC150 controller to use two different oscillator frequencies through a pullup control at initial DLPC150 controller power-up. If a pullup is applied to this pin then a 16.0-MHz oscillator option must be used instead of the 24-MHz option shown.
DLPC150 tim_sys_oscil_LPS038.gifFigure 3. System Oscillators