SNLS638A December 2018 – August 2019 DP83825I
The DP83825I is capable of operating with a 3.3-V or 1.8-V of I/O supply voltages along with analog supply of 3.3 V. DP83825I needs VDDA3V3 after VDDIO is fully ramped. Details are captured in the Timing Diagrams. If power sequencing is not feasible on the customer board, then an external Reset (RST_N) is needed on pin 5 when both power VDDA3V3 and VDDIO supplies are ramped.
Figure 20 shows the recommended power supply de-coupling network.