SNLS638A December 2018 – August 2019 DP83825I
MII Loopback is the most shallow loop through the PHY. It is a useful test mode to validate communications between the MAC and the PHY. When in MII Loopback, data transmitted from a connected MAC on the TX path is internally looped back in the DP83825I to the RX pins where it can be checked by the MAC.
MII Loopback is enabled by setting bit in the BMCR and bit in BISCR.