Smallest form factor (3-mm by 3-mm), low-power 10/100-Mbps Ethernet PHY transceiver with 50-MHz c
Product details
Parameters
Package | Pins | Size
Features
- Ultra Small Form Factor 10/100 Mbps PHY : QFN 3 mm × 3 mm, 24 pin
- Cable reach > 150 meters
- Very low power consumption < 127 mW
- Small system solution : integrated MDI and MAC termination resistors
- Programmable energy saving modes
- Active sleep
- Deep power-down
- Energy Efficient Ethernet (EEE) IEEE 802.3az
- EEE support for legacy MAC
- Wake-on-LAN (WoL)
- Voltage mode line driver
- MAC interface : RMII (master and slave mode)
- Single 3.3 V power supply
- I/O voltages: 1.8 V and 3.3 V
- Repeater : RMII back-to-back mode in unmanaged mode
- MDC/MDIO Interface for configuration and status
- Fast link drop modes
- Diagnostics features
- TDR-based cable diagnostics for open, short
- Built-in packet generator
- Multiple loopbacks
- Programmable Hardware interrupt pin
- Operating temperature range: –40°C to 85°C
- Compliant to IEEE 802.3 100BASE-TX and 10BASE-Te specification
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Description
The DP83825I is an ultra small form factor, very low power Ethernet Physical Layer transceiver with integrated PMD sublayers to support 10BASE-Te, 100BASE-TX Ethernet protocols. It supports up to 150 meters reach over CAT5e cable. The DP83825I interfaces directly to twisted pair media via an external transformer. It interfaces to the MAC layer through Reduced MII (RMII) both in Master and Slave mode. It provide 50-MHz output clock in RMII Master Mode. This clock is synchronized to MDI derived clock to reduce the jitter in the system.
The DP83825I also supports Energy Efficient Ethernet, Wake-on-LAN and MAC isolation to further lower the system power consumption. Energy Efficient Mode can be enabled through register configuration for legacy MACs not supporting EEE signaling over MAC. DP83825I can operate in un-managed repeater mode. In this mode, DP83825I works as a repeater without register configuration. The DP83825I offers integrated cable diagnostic tools, built-in self-test and loopback capabilities for ease of development and debug.
Same functionality but is not pin-for-pin or parametrically equivalent to the compared device:
Technical documentation
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
The DP83825EVM lets designers evaluate the industry’s smallest form-factor, 10BASE-Te/100BASE-TX Ethernet physical layer transceiver, the DP83825I PHY. This evaluation module (EVM) lets designers use one of two interfaces: a network interface through an RJ-45 connector and a MAC interface (...)
Features
- 150-m Cat5 cable reach
- 100Base-TX, 10Base-Te
- On-Board MSP430F5529 with USB-2-MDIO for register access
- Supports interoperability testing, compliance testing and BER testing
Software development
The USB-2-MDIO software lets you directly access the registers during debug and prototyping. (...)
Design tools & simulation
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
Reference designs
Design files
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download TIDA-010046 BOM Files.zip (258KB) -
download TIDA-010046 Assembly Files.zip (525KB) -
download TIDA-010046 Layer Plots.zip (2991KB) -
download TIDA-010046 CAD Files.zip (7249KB) -
download TIDA-010046 Gerber.zip (1004KB)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
WQFN (RMQ) | 24 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
Support & training
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