SLOSE98A December   2022  – September 2023 DRV8461

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
      1. 6.5.1 SPI Timing Requirements
      2. 6.5.2 STEP and DIR Timing Requirements
    6. 6.6 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Interface of Operation
      2. 7.3.2  Stepper Motor Driver Current Ratings
        1. 7.3.2.1 Peak Current Rating
        2. 7.3.2.2 RMS Current Rating
        3. 7.3.2.3 Full-Scale Current Rating
      3. 7.3.3  PWM Motor Drivers
      4. 7.3.4  Microstepping Indexer
      5. 7.3.5  Indexer Output
        1. 7.3.5.1 nHOME Output
      6. 7.3.6  Automatic Microstepping Mode
      7. 7.3.7  Custom Microstepping Table
      8. 7.3.8  Current Regulation
        1. 7.3.8.1 Internal Reference Voltage
      9. 7.3.9  Standstill Power Saving Mode
      10. 7.3.10 Current Regulation Decay Modes
        1. 7.3.10.1 Slow Decay
        2. 7.3.10.2 Mixed Decay
        3. 7.3.10.3 Smart tune Dynamic Decay
        4. 7.3.10.4 Smart tune Ripple Control
        5. 7.3.10.5 PWM OFF Time
        6. 7.3.10.6 Current Regulation Blanking Time and Deglitch Time
      11. 7.3.11 Current Sensing with External Resistor
      12. 7.3.12 Silent step decay mode
      13. 7.3.13 Auto-torque Dynamic Current Adjustment
        1. 7.3.13.1 Auto-torque Learning Routine
        2. 7.3.13.2 Current Control Loop
        3. 7.3.13.3 PD Control Loop
      14. 7.3.14 Charge Pump
      15. 7.3.15 Linear Voltage Regulator
      16. 7.3.16 VCC Voltage Supply
      17. 7.3.17 Logic Level, Tri-Level and Quad-Level Pin Diagrams
      18. 7.3.18 Spread Spectrum
      19. 7.3.19 Protection Circuits
        1. 7.3.19.1  VM Undervoltage Lockout
        2. 7.3.19.2  VCP Undervoltage Lockout (CPUV)
        3. 7.3.19.3  Logic Supply Power on Reset (POR)
        4. 7.3.19.4  Overcurrent Protection (OCP)
          1. 7.3.19.4.1 Latched Shutdown
          2. 7.3.19.4.2 Automatic Retry
        5. 7.3.19.5  Stall Detection
        6. 7.3.19.6  Open-Load Detection (OL)
        7. 7.3.19.7  Overtemperature Warning (OTW)
        8. 7.3.19.8  Thermal Shutdown (OTSD)
          1. 7.3.19.8.1 Latched Shutdown
          2. 7.3.19.8.2 Automatic Retry
        9. 7.3.19.9  Supply voltage sensing
        10. 7.3.19.10 nFAULT Output
        11. 7.3.19.11 Fault Condition Summary
      20. 7.3.20 Device Functional Modes
        1. 7.3.20.1 Sleep Mode
        2. 7.3.20.2 Disable Mode
        3. 7.3.20.3 Operating Mode
        4. 7.3.20.4 nSLEEP Reset Pulse
        5. 7.3.20.5 Functional Modes Summary
    4. 7.4 Programming
      1. 7.4.1 Serial Peripheral Interface (SPI) Communication
        1. 7.4.1.1 SPI Format
        2. 7.4.1.2 SPI for Multiple Target Devices in Daisy Chain Configuration
        3. 7.4.1.3 SPI for Multiple Target Devices in Parallel Configuration
    5. 7.5 Register Maps
      1. 7.5.1 Status Registers
        1. 7.5.1.1 FAULT (address = 0x00) [Default = 00h]
        2. 7.5.1.2 DIAG1 (address = 0x01) [Default = 00h]
        3. 7.5.1.3 DIAG2 (address = 0x02) [Default = 00h]
        4. 7.5.1.4 DIAG3 (address = 0x03) [Default = 00h]
      2. 7.5.2 Control Registers
        1. 7.5.2.1  CTRL1 (address = 0x04) [Default = 0Fh]
        2. 7.5.2.2  CTRL2 (address = 0x05) [Default = 06h]
        3. 7.5.2.3  CTRL3 (address = 0x06) [Default = 38h]
        4. 7.5.2.4  CTRL4 (address = 0x07) [Default = 49h]
        5. 7.5.2.5  CTRL5 (address = 0x08) [Default = 03h]
        6. 7.5.2.6  CTRL6 (address = 0x09) [Default = 20h]
        7. 7.5.2.7  CTRL7 (address = 0x0A) [Default = FFh]
        8. 7.5.2.8  CTRL8 (address = 0x0B) [Default = 0Fh]
        9. 7.5.2.9  CTRL9 (address = 0x0C) [Default = 10h]
        10. 7.5.2.10 CTRL10 (address = 0x0D) [Default = 80h]
        11. 7.5.2.11 CTRL11 (address = 0x0E) [Default = FFh]
        12. 7.5.2.12 CTRL12 (address = 0x0F) [Default = 20h]
        13. 7.5.2.13 CTRL13 (address = 0x10) [Default = 10h]
        14. 7.5.2.14 CTRL14 (address = 0x3C) [Default = 58h]
      3. 7.5.3 Indexer Registers
        1. 7.5.3.1 INDEX1 (address = 0x11) [Default = 80h]
        2. 7.5.3.2 INDEX2 (address = 0x12) [Default = 80h]
        3. 7.5.3.3 INDEX3 (address = 0x13) [Default = 80h]
        4. 7.5.3.4 INDEX4 (address = 0x14) [Default = 82h]
        5. 7.5.3.5 INDEX5 (address = 0x15) [Default = B5h]
      4. 7.5.4 Custom Microstepping Registers
        1. 7.5.4.1 CUSTOM_CTRL1 (address = 0x16) [Default = 00h]
        2. 7.5.4.2 CUSTOM_CTRL2 (address = 0x17) [Default = 00h]
        3. 7.5.4.3 CUSTOM_CTRL3 (address = 0x18) [Default = 00h]
        4. 7.5.4.4 CUSTOM_CTRL4 (address = 0x19) [Default = 00h]
        5. 7.5.4.5 CUSTOM_CTRL5 (address = 0x1A) [Default = 00h]
        6. 7.5.4.6 CUSTOM_CTRL6 (address = 0x1B) [Default = 00h]
        7. 7.5.4.7 CUSTOM_CTRL7 (address = 0x1C) [Default = 00h]
        8. 7.5.4.8 CUSTOM_CTRL8 (address = 0x1D) [Default = 00h]
        9. 7.5.4.9 CUSTOM_CTRL9 (address = 0x1E) [Default = 00h]
      5. 7.5.5 Auto torque Registers
        1. 7.5.5.1  ATQ_CTRL1 (address = 0x1F) [Default = 00h]
        2. 7.5.5.2  ATQ_CTRL2 (address = 0x20) [Default = 00h]
        3. 7.5.5.3  ATQ_CTRL3 (address = 0x21) [Default = 00h]
        4. 7.5.5.4  ATQ_CTRL4 (address = 0x22) [Default = 20h]
        5. 7.5.5.5  ATQ_CTRL5 (address = 0x23) [Default = 00h]
        6. 7.5.5.6  ATQ_CTRL6 (address = 0x24) [Default = 00h]
        7. 7.5.5.7  ATQ_CTRL7 (address = 0x25) [Default = 00h]
        8. 7.5.5.8  ATQ_CTRL8 (address = 0x26) [Default = 00h]
        9. 7.5.5.9  ATQ_CTRL9 (address = 0x27) [Default = 00h]
        10. 7.5.5.10 ATQ_CTRL10 (address = 0x28) [Default = 08h]
        11. 7.5.5.11 ATQ_CTRL11 (address = 0x29) [Default = 0Ah]
        12. 7.5.5.12 ATQ_CTRL12 (address = 0x2A) [Default = FFh]
        13. 7.5.5.13 ATQ_CTRL13 (address = 0x2B) [Default = 05h]
        14. 7.5.5.14 ATQ_CTRL14 (address = 0x2C) [Default = 0Fh]
        15. 7.5.5.15 ATQ_CTRL15 (address = 0x2D) [Default = 00h]
        16. 7.5.5.16 ATQ_CTRL16 (address = 0x2E) [Default = FFh]
        17. 7.5.5.17 ATQ_CTRL17 (address = 0x2F) [Default = 00h]
        18. 7.5.5.18 ATQ_CTRL18 (address = 0x30) [Default = 00h]
      6. 7.5.6 Silent Step Registers
        1. 7.5.6.1 SS_CTRL1 (address = 0x31) [Default = 00h]
        2. 7.5.6.2 SS_CTRL2 (address = 0x32) [Default = 00h]
        3. 7.5.6.3 SS_CTRL3 (address = 0x33) [Default = 00h]
        4. 7.5.6.4 SS_CTRL4 (address = 0x34) [Default = 00h]
        5. 7.5.6.5 SS_CTRL5 (address = 0x35) [Default = FFh]
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Stepper Motor Speed
      3. 8.2.3 Application Performance Plots
      4. 8.2.4 Thermal Application
        1. 8.2.4.1 Power Dissipation
        2. 8.2.4.2 Conduction Loss
        3. 8.2.4.3 Switching Loss
        4. 8.2.4.4 Power Dissipation Due to Quiescent Current
        5. 8.2.4.5 Total Power Dissipation
        6. 8.2.4.6 Device Junction Temperature Estimation
  10. Thermal Considerations
    1. 9.1 Thermal Pad
    2. 9.2 PCB Material Recommendation
  11. 10Power Supply Recommendations
    1. 10.1 Bulk Capacitance
    2. 10.2 Power Supplies
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Stall Detection

When operating with the SPI interface, the DRV8461 supports stall detection.

Stepper motors have a distinct relation between the winding current, back-EMF, and mechanical torque load of the motor, as shown in Figure 7-42. For an unloaded motor, the back-EMF is 90° out-of-phase with the winding current. As motor load approaches the maximum torque capability of the motor for a given winding current, the back-EMF will move in phase with the winding current. By detecting back-EMF phase shift between rising and falling current quadrants of the motor current, the DRV8461 can detect a motor overload stall condition or an end-of-line travel.

GUID-8FCBA2FD-7B1A-4DE1-81A6-0B93919F899B-low.gifFigure 7-42 Stall Detection by Monitoring Motor Back-EMF

The Stall Detection algorithm is enabled when -

  • The device is programmed to operate with the SPI interface (MODE = 1)

  • The decay mode is programmed as smart tune Ripple Control (DECAY = 111b)

  • EN_STL is 1b

  • No fault condition exists (UVLO, OCP, OL, OTSD etc.).

The algorithm compares the back-EMF between the rising and falling current quadrants by monitoring PWM off time and generates a parameter called torque count, represented by the TRQ_COUNT register. The comparison is done in such a way that the TRQ_COUNT is largely independent of motor current, ambient temperature and supply voltage. Motor stall can be detected even if the driver is operating in full step mode.

TRQ_COUNT is calculated as a running average from the most recent four electrical half-cycles. TRQ_COUNT register is updated once every electrical half-cycle. The updated TRQ_COUNT is compared with the STALL_TH, and if a stall condition is detected, stall fault will be reported and latched at the electrical half-cycle current zero crossing.

For a lightly loaded motor, the TRQ_COUNT will be a non-zero value. As the motor approaches stall condition, TRQ_COUNT will approach zero and can be used to detect stall condition.

  • If anytime TRQ_COUNT falls below the stall threshold (represented by the STALL_TH register), the device will detect a stall.

  • STALL, STL and FAULT bits are latched 1b in the SPI register.

  • The STL_REP bit controls how stall is reported.

    • If STL_REP is 1b, the nFAULT pin will be driven low when a stall is detected.

    • If STEL_REP is 0b, the nFAULT pin will stay high even if stall is detected.

In the stalled condition, the motor shaft does not spin. The motor starts to spin again when the stall condition is removed and the motor ramps to its target speed. The nFAULT is released and the fault registers are cleared when a clear faults command is issued either via the CLR_FLT bit or an nSLEEP reset pulse.

High motor coil resistance can result in low TRQ_COUNT. The TRQ_SCALE bit allows scaling up low TRQ_COUNT values, for ease of further processing.

  • If the initially calculated TRQ_COUNT value is less than 500 and the TRQ_SCALE bit is 1b, then the TRQ_COUNT output in register is multiplied by a factor of 8.

  • If the TRQ_SCALE bit is 0b, TRQ_COUNT retains the value originally calculated by the algorithm.

Stall threshold can be set in two ways –

  • The user can write the STALL_TH bits by observing the behavior of the TRQ_COUNT output at all operating conditions.

  • The algorithm can learn the stall threshold using the automatic stall learning process, described below:

    • Before learning, ensure that the motor has reached its target speed. Do not learn stall threshold while the motor speed is ramping up or down.

    • Start learning by setting the STL_LRN bit to 1b.

    • Run motor with no load.

    • Wait for 32 electrical cycles for the driver to learn the steady-state count.

    • Stall the motor.

    • Wait for 16 electrical cycles for the driver to learn the stall count.

    • The STL_LRN_OK bit becomes 1b if learning is successful.

    • Stall threshold is calculated as the average of steady count and stall count and stored in the STALL_TH register.

The flowchart on how to set stall threshold is shown below.

GUID-20220604-SS0I-Q7L2-R2TC-ZXSDX6KHGZB5-low.svgFigure 7-43 Stall learning flowchart

Sometimes the automatic stall learning process might not be successful due to unstable torque count while the motor is running or is stalled. For example, when the motor has high coil resistance or is running at very high or low speeds, the torque count might vary a lot over time and the difference between steady count and stall count might be small. In such cases, it is recommended not to use the automatic stall learning method. Instead, the user should carefully study the steady count and torque count across the range of operating conditions and set the threshold midway between the minimum steady count and the maximum stall count.

A stall threshold learnt at one speed may not work well for another speed. It is recommended to re-learn the stall threshold every time the motor speed is changed by more than ± 10%.

Note:

  • The stall detection algorithm depends on back-EMF modifying the PWM off time. The back-EMF is directly proportional to the speed of the motor. In order for stall detection to work reliably, motor speed should be sufficiently high to be able to generate back-EMF of sufficient amplitude. Higher motor coil resistance would require higher minimum speed for reliable stall detection.

  • When the device goes from Disable mode (H-bridges Hi-z) to Active mode by toggling EN_OUT bit or ENABLE pin; or when the device recovers from a fault by issuing a CLR_FLT, stall detection fault may also be flagged. This is because of the time taken by TRQ_CNT to reach a value higher than STL_TH. As a result of the stall fault, nFAULT may stay low (if STL_REP = 1b), and another CLR_FLT will be needed to release stall fault and nFAULT pin. This can be prevented by -

    • Enabling stall detection after enabling active mode (write EN_STALL = 1b only after writing EN_OUT = 1b and making ENABLE = logic high)

    • By starting the STEP pulses only after the bridge is in active mode or after a CLR_FLT command has been issued to clear a fault condition.

  • If there is loss of current regulation due to low supply voltage, high coil resistance or high speed of the motor, stall detection may not work reliably, because the TRQ_COUNT can be erratic and may jump to a high value. This can be checked and confirmed by looking at the coil current waveform. If the coil current has a standard sinusoidal waveform, and the peak of the sinusoid reaches the desired full-scale current, then stall detection will work reliably. If the current waveform is triangular due to high speed or low supply voltage, stall detection algorithm might not work reliably.

  • If EN_STL = 1b and auto-torque is also enabled, coil current goes to ATQ_TRQ_MAX when motor stall is detected.

  • If EN_STL = 0b and auto-torque is enabled, coil current goes to ATQ_TRQ_MIN when motor is stalled.