SLVSCC0D November 2013 – October 2019 DRV8850
The dead time (tDEAD) is measured as the time when OUTx is Hi-Z between turning off one of the H-bridge FETs and turning on the other. For example, the output is Hi-Z between turning off the high-side FET and turning on the low-side FET. When driving current out of the pin, the output is observed to fall to one diode drop below ground during dead time. When driving current into the pin, the output is observed to rise to one diode drop above VCC.
The DRV8850 has an analog dead time of approximately 100 ns. In addition to this analog dead time, the output is Hi-Z when the FET gate voltage is less than the threshold voltage. The total dead time depends on the SR resistor setting because a portion of the FET gate ramp includes the observable dead time.