SLVSIL6C January   2026  – April 2026 INA151

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
      1. 7.1.1 INA151 Transconductance Architecture Overview
      2. 7.1.2 Multiplexing Capability
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input Common-Mode Voltage Range
      2. 7.3.2 Low Input Bias Current
      3. 7.3.3 Reference Voltage Range for G=1/4 (INA151D)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Output Enable and Disable
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Reference Pin
    2. 8.2 Typical Applications
      1. 8.2.1 Battery Monitoring Using INA151
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 DC Accuracy Calculations
          2. 8.2.1.2.2 RC Filter Design Consideration
          3. 8.2.1.2.3 ADC Input Protection
        3. 8.2.1.3 Output Pullup Resistor in Multiplexer Configuration
        4. 8.2.1.4 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 PSpice® for TI
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.2 Low Input Bias Current

The topology in the INA151 build in an input bias current stage that requires a typical common-mode bias current of 20μA to allow operate at very high common-mode voltages. As shown in Figure 7-4, the bias stage allows the common-mode bias current to be constant across the common-mode range, enabling minimal error implications for a precision voltage monitoring system.

The bias circuit in the INA151 includes resistance between the input pins with an effective differential input impedance of 45kΩ. This differential impedance creates differential input bias current flowing in and out of the device proportional to the input differential voltage, depicted in Figure 7-5. The total input bias current for each input pin is the summation of the common-mode leakage from input to reference, IBCM, and the differential current, IBDIFF.

INA151 INA151 Input Bias Current vs Common-Mode Voltage Figure 7-4 INA151 Input Bias Current vs Common-Mode Voltage
INA151 INA151 Input Bias Current vs Differential Input Voltage Figure 7-5 INA151 Input Bias Current vs Differential Input Voltage