SLVSIL6C January   2026  – April 2026 INA151

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
      1. 7.1.1 INA151 Transconductance Architecture Overview
      2. 7.1.2 Multiplexing Capability
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input Common-Mode Voltage Range
      2. 7.3.2 Low Input Bias Current
      3. 7.3.3 Reference Voltage Range for G=1/4 (INA151D)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Output Enable and Disable
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Reference Pin
    2. 8.2 Typical Applications
      1. 8.2.1 Battery Monitoring Using INA151
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 DC Accuracy Calculations
          2. 8.2.1.2.2 RC Filter Design Consideration
          3. 8.2.1.2.3 ADC Input Protection
        3. 8.2.1.3 Output Pullup Resistor in Multiplexer Configuration
        4. 8.2.1.4 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 PSpice® for TI
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

INA151 Transconductance Architecture Overview

The INA151 employs a transconductance-based architecture utilizing current-feedback amplifier topology to achieve low bias currents of 20μA and a common-mode voltage of 110V above negative supply. The block diagram illustrated in INA151 Simplified Example Application Schematic of INA151B demonstrates the dual-stage approach of this architecture. In the first stage the differential voltage is translated to a differential current through R1. The differential output current is further converted into a single-ended output voltage in the second amplifier stage.

The closed-loop voltage gain VOUT/VIN is established by the ratio of the internal precision resistors R3 by R1. Consequently, gain accuracy is mainly limited by the resistor matching tolerance between the signal paths, making precision thin-film resistor implementation critical for the performance.

These key architectural features make the INA151 ideally suited for serial stacked battery cell monitoring applications, enabling precise voltage measurements across up to 20 series-connected battery cells.

The INA151 encompasses four gain variants. The INA151A version offers gain option of 1, while the INA151B, INA151C and INA151D versions offer gain options of ⅔, ½ and ¼ respectively. The multiple gain variants are designed to accommodate the full-scale input ranges of various ADC requirements, maximizing measurement resolution and dynamic range.