SBOS776C March 2016 – March 2021 INA3221-Q1
PRODUCTION DATA
The INA3321 features a software reset that reinitializes the device and register settings to default power-up values without having to cycle power to the device. Use bit 15 (RST) of the Configuration register to perform a software reset. Setting RST reinitializes all registers and settings to the default power state with the exception of the power-valid output state.
If a software reset is issued, the INA3221-Q1 holds the output of the PV pin until the power-valid detection sequence completes. The Power-Valid Upper Limit and Power-Valid Lower limit registers return to the default state when the software reset has been issued. Therefore, any reprogrammed limit registers are reset, resulting in the original power-valid thresholds validating the power-valid conditions. This architecture prevents interruption to circuitry connected to the power valid output during a software reset event.