SBOSAI8A March   2025  – July 2025 INA630

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Setting the Gain
        1. 7.3.1.1 Gain Error and Drift
      2. 7.3.2 Linear Input Voltage Range
      3. 7.3.3 Input Protection
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Reference Pin
      2. 8.1.2 Input Bias Current Return Path
    2. 8.2 Typical Applications
      1. 8.2.1 Current Shunt Monitoring in Battery Testing Systems
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Examples
  10. 9 Device and Documentation Support
    1. 9.1 Third-Party Products Disclaimer
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.1.1 Reference Pin

In traditional 3-op amp instrumentation amplifier, the output voltage is developed with respect to the voltage on the reference pin (REF). Often in dual-supply operation, this reference pin connects to the low-impedance system ground so any additional impedance at the reference pin degrades the CMRR and gain accuracy.

Impedance on the INA630 reference pin does not affect the CMRR due to the architecture.

However, gain accuracy can be affected by impedance on the reference pin (see Equation 2):

Equation 2. G   =   1   +   R 2 + R R E F R 1    
INA630 Effect of Reference Pin Impedance on Gain Accuracy Figure 8-1 Effect of Reference Pin Impedance on Gain Accuracy

To ensure negligible effect of the reference pin impedance on the gain accuracy (<0.001%), keep:

  • Reference impedance < 0.2Ω for G = 20V/V, R1 = 1kΩ
  • Reference impedance < 1Ω for G = 100V/V, R1 = 1kΩ

Voltage reference devices can provide low-impedance voltage sources for the reference pin.