SLLS897F march   2008  – august 2023 ISO1176

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics: Driver
    10. 6.10 Electrical Characteristics: Receiver
    11. 6.11 Supply Current
    12. 6.12 Electrical Characteristics: ISODE-Pin
    13. 6.13 Switching Characteristics: Driver
    14. 6.14 Switching Characteristics: Receiver
    15. 6.15 Insulation Characteristics Curves
    16. 6.16 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Device Functional Modes
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Transient Voltages
        2. 9.2.2.2 ISO1176 “Sticky Bit” Issue (Under Certain Conditions)
      3. 9.2.3 Application Curve
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Switching Characteristics: Driver

All typical specs are at VCC1=3.3V, VCC2=5V, TA=27°C, (Min/Max specs are over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ISO1176
tPHL, tPLH Propagation delay VCC1 at 5 V, VCC2 at 5 V 35 ns
tsk(p)
Pulse skew (|tPHL – tPLH|)
 
2 7.5 ns
tPHL, tPLH Propagation delay VCC1 at 3.3 V, VCC2 at 5 V 40 ns
tsk(p)
Pulse skew (|tPHL – tPLH|)
 
2 7.5 ns
tr, tf Differential output rise time and fall time See Figure 17 2 3 7.5 ns
tpDE DE to ISODE prop delay See Figure 21 30 ns
tt(MLH), tt(MHL) Output transition skew See Figure 18 1 ns
tP(AZH), tP(BZH), tP(AZL), tP(BZL)
Propagation delay, high-impedance-to-active output
 
CL = 50 pF, RE at 0 V, See Fgure 19 and Figure 20 80 ns
tP(AHZ), tP(BHZ), tP(ALZ), tP(BLZ) Propagation delay time, active-to-high-impedance output 80 ns
|tP(AZL) – tP(BZH)|, |tP(AZH) – tP(BZL)|
Enable skew time

0.55 1.5 ns

t(CFB)
 

Time from application of short-circuit to current foldback

See Figure 16 0.5 µs

t(TSD)
 

Time from application of short-circuit to thermal shutdown


TA = 25°C, See Figure 16
 
100 µs