SLVS297Q April   2000  – July 2025 LM317M , LM317MQ

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics (Both Legacy and New Chip)
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Current Limit
      2. 6.3.2 Dropout Voltage (VDO)
      3. 6.3.3 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
  8. 7 Applications and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1  Input and Output Capacitor Requirements (Legacy Chip)
        2. 7.2.2.2  Input and Output Capacitor Requirements (New Chip)
        3. 7.2.2.3  Feedback Resistors
        4. 7.2.2.4  Adjustment Pin Capacitor
        5. 7.2.2.5  Protection Diodes
        6. 7.2.2.6  Overload Recovery
        7. 7.2.2.7  Estimating Junction Temperature
        8. 7.2.2.8  Polarity Reversal Protection
        9. 7.2.2.9  Reverse Current
        10. 7.2.2.10 Power Dissipation (PD)
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Evaluation Module
      2. 8.1.2 Device Nomenclature
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.3.1 Current Limit

The device has an internal current-limit circuit that protects the regulator during transient high-load current faults or shorting events. In a high-load current fault, the current limit scheme limits the output current to the current limit (ICL). ICL is listed in the Electrical Characteristics (Both Legacy and New Chip) table.

The output voltage is not regulated when the device is in current limit. When a current-limit event occurs, the device begins to heat up because of the increase in power dissipation. When the device is in current limit, the pass transistor dissipates power [(VI – VO) × ICL]. For more information on current limits, see the Know Your Limits application note.

To achieve a safe operation across a wide range of Input voltage, the device also has a built-in protection mechanism with current limit. The protection mechanism decreases the current limit as input-to-output voltage increases and keeps the power transistor inside a safe operating region for all values of input-to-output voltage. This protection is designed to provide some output current at all values of input-to-output voltage limits defined in the Recommended Operating Conditions table. Figure 6-1 illustrates the behavior of the current limit variation.

LM317M LM317MQ Current-Limit vs VHead-room Behavior (New Chip) Figure 6-1 Current-Limit vs VHead-room Behavior (New Chip)