SNOS631E November   1994  – March 2025 LMC6061 , LMC6062 , LMC6064

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Pin Configuration and Functions
  6. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information: LMC6061
    5. 5.5 Thermal Information: LMC6062
    6. 5.6 Thermal Information: LMC6064
    7. 5.7 Electrical Characteristics
    8. 5.8 Typical Characteristics
  7. 6Application and Implementation
    1. 6.1 Applications Information
      1. 6.1.1 Amplifier Topology
      2. 6.1.2 Compensating For Input Capacitance
      3. 6.1.3 Capacitive Load Tolerance
      4. 6.1.4 Latchup
    2. 6.2 Typical Applications
      1. 6.2.1 Instrumentation Amplifier
      2. 6.2.2 Low-Leakage Sample-and-Hold
      3. 6.2.3 1Hz Square-Wave Oscillator
    3. 6.3 Layout
      1. 6.3.1 Layout Guidelines
        1. 6.3.1.1 Printed Circuit Board Layout For High Impedance Work
      2. 6.3.2 Layout Example
  8. 7Device and Documentation Support
    1. 7.1 Receiving Notification of Documentation Updates
    2. 7.2 Support Resources
    3. 7.3 Trademarks
    4. 7.4 Electrostatic Discharge Caution
    5. 7.5 Glossary
  9. 8Revision History
  10. 9Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.8 Typical Characteristics

at VS = ±7.5V and TA = 25°C (unless otherwise specified)

LMC6061 LMC6062 LMC6064 Distribution of Input Offset Voltage
TA = 25°C   
Figure 5-1 Distribution of Input Offset Voltage
LMC6061 LMC6062 LMC6064 Distribution of Input Offset Voltage
TA = 125°C   
Figure 5-3 Distribution of Input Offset Voltage
LMC6061 LMC6062 LMC6064 Supply Current vs Supply Voltage
   
Figure 5-5 Supply Current vs Supply Voltage
LMC6061 LMC6062 LMC6064 Common Mode Rejection Ratio vs Frequency
   
Figure 5-7 Common Mode Rejection Ratio vs Frequency
LMC6061 LMC6062 LMC6064 Input Voltage Noise vs Frequency
   
Figure 5-9 Input Voltage Noise vs Frequency
LMC6061 LMC6062 LMC6064 Output Characteristics Sinking Current
   
Figure 5-11 Output Characteristics Sinking Current
LMC6061 LMC6062 LMC6064 Gain and Phase Response vs Capacitive Load
RL = 20kΩ   
Figure 5-13 Gain and Phase Response vs Capacitive Load
LMC6061 LMC6062 LMC6064 Open-Loop Frequency Response
   
Figure 5-15 Open-Loop Frequency Response
LMC6061 LMC6062 LMC6064 Inverting Large-Signal Pulse Response
   
Figure 5-17 Inverting Large-Signal Pulse Response
LMC6061 LMC6062 LMC6064 Noninverting Large-Signal Pulse Response
   
Figure 5-19 Noninverting Large-Signal Pulse Response
LMC6061 LMC6062 LMC6064 Stability vs Capacitive Load
RL = 20kΩ   
Figure 5-21 Stability vs Capacitive Load
LMC6061 LMC6062 LMC6064 Distribution of Input Offset Voltage
TA = −55°C   
Figure 5-2 Distribution of Input Offset Voltage
LMC6061 LMC6062 LMC6064 Input Bias Current vs Temperature
   
Figure 5-4 Input Bias Current vs Temperature
LMC6061 LMC6062 LMC6064 Input Voltage vs Output Voltage
   
Figure 5-6 Input Voltage vs Output Voltage
LMC6061 LMC6062 LMC6064 Power Supply Rejection Ratio vs Frequency
   
Figure 5-8 Power Supply Rejection Ratio vs Frequency
LMC6061 LMC6062 LMC6064 Output Characteristics Sourcing Current
   
Figure 5-10 Output Characteristics Sourcing Current
LMC6061 LMC6062 LMC6064 Gain and Phase Response vs Temperature
TA = −55°C to +125°C  
Figure 5-12 Gain and Phase Response vs Temperature
LMC6061 LMC6062 LMC6064 Gain and Phase Response vs Capacitive Load
RL = 500kΩ   
Figure 5-14 Gain and Phase Response vs Capacitive Load
LMC6061 LMC6062 LMC6064 Inverting Small-Signal Pulse Response
   
Figure 5-16 Inverting Small-Signal Pulse Response
LMC6061 LMC6062 LMC6064 Noninverting Small-Signal Pulse Response
   
Figure 5-18 Noninverting Small-Signal Pulse Response
LMC6061 LMC6062 LMC6064 Crosstalk Rejection vs Frequency
   
Figure 5-20 Crosstalk Rejection vs Frequency
LMC6061 LMC6062 LMC6064 Stability vs Capacitive Load
RL = 1MΩ  
Figure 5-22 Stability vs Capacitive Load