SNVSAT4A September 2017 – June 2021 LP873220-Q1
The device address for the LP873220-Q1 is 0x61.
After the START condition, the I2C master sends the 7-bit address followed by an eighth bit, read or write (R/W). R/W = 0 indicates a WRITE and R/W = 1 indicates a READ. The second byte following the device address selects the register address to which the data is written. The third byte contains the data for the selected register.