SBOS309E August   2004  – December 2024 OPA2830

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configurations and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics VS = ±5V
    6. 6.6  Electrical Characteristics VS = 5V
    7. 6.7  Electrical Characteristics VS = 3V
    8. 6.8  Typical Characteristics: VS = ±5V
    9. 6.9  Typical Characteristics: VS = ±5V, Differential Configuration
    10. 6.10 Typical Characteristics: VS = 5V
    11. 6.11 Typical Characteristics: VS = 5V, Differential Configuration
    12. 6.12 Typical Characteristics: VS = 3V
    13. 6.13 Typical Characteristics: VS = 3V, Differential Configuration
  8. 7 Parameter Measurement Information
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1  Wideband Voltage-Feedback Operation
      2. 8.1.2  Single-Supply ADC Interface
      3. 8.1.3  DC Level-Shifting
      4. 8.1.4  AC-Coupled Output Video Line Driver
      5. 8.1.5  Noninverting Amplifier With Reduced Peaking
      6. 8.1.6  Single-Supply Active Filter
      7. 8.1.7  Differential Low-Pass Active Filters
      8. 8.1.8  High-Pass Filters
      9. 8.1.9  High-Performance DAC Transimpedance Amplifier
      10. 8.1.10 Operating Suggestions Optimizing Resistor Values
      11. 8.1.11 Bandwidth vs Gain: Noninverting Operation
      12. 8.1.12 Inverting Amplifier Operation
      13. 8.1.13 Output Current and Voltages
      14. 8.1.14 Driving Capacitive Loads
      15. 8.1.15 Distortion Performance
      16. 8.1.16 Noise Performance
      17. 8.1.17 DC Accuracy and Offset Control
    2. 8.2 Power Supply Recommendations
      1. 8.2.1 Thermal Analysis
    3. 8.3 Layout
      1. 8.3.1 Board Layout Guidelines
        1. 8.3.1.1 Input and ESD Protection
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Design-In Tools
        1. 9.1.1.1 Demonstration Fixtures
        2. 9.1.1.2 Macro-model and Applications Support
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • DGK|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.1.8 High-Pass Filters

Figure 8-12 shows another approach to mid-supply biasing. This method uses a bypassed divider network in place of the buffer used in Figure 8-10. The impedance is set by the parallel combination of the resistors forming the divider network, but as frequency increases impedance looks more and more like a short due to the capacitor. Generally, the capacitor value must be two to three orders of magnitude greater than the filter capacitors shown for the circuit to properly work.

OPA2830 138kHz, 2nd-Order, High-Pass FilterFigure 8-12 138kHz, 2nd-Order, High-Pass Filter

Results showing the frequency response for the circuit of Figure 8-12 is shown in Figure 8-13.

OPA2830 Frequency Response for the Filter of Figure 8-12 Figure 8-13 Frequency Response for the Filter of Figure 8-12