SLES023D December 2001 – December 2016 PCM1802
PRODUCTION DATA.
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
AGND | 6 | — | Analog GND |
BCK | 11 | I/O | Bit clock input and output(1) |
BYPAS | 8 | I | HPF bypass control. Low: normal mode (DC cut); High: bypass mode (through)(2) |
DGND | 13 | — | Digital GND |
DOUT | 12 | O | Audio data output |
FMT0 | 17 | I | Audio data format select 0 (see Data Format)(2) |
FMT1 | 18 | I | Audio data format select 1 (see Data Format)(2) |
FSYNC | 9 | I/O | Frame synchronous clock input and output(1) |
LRCK | 10 | I/O | Sampling clock input and output(1) |
MODE0 | 19 | I | Mode select 0 (see Interface Mode)(2) |
MODE1 | 20 | I | Mode select 1 (see Interface Mode)(2) |
OSR | 16 | I | Oversampling ratio select. Low: ×64 fS; High: ×128 fS(2) |
PDWN | 7 | I | Power-down control, active-low(2) |
SCKI | 15 | I | System clock input; 256 fS, 384 fS, 512 fS, or 768 fS(3) |
VCC | 5 | — | Analog power supply, 5 V |
VDD | 14 | — | Digital power supply, 3.3 V |
VINL | 1 | I | Analog input, L-channel |
VINR | 2 | I | Analog input, R-channel |
VREF1 | 3 | — | Reference-1 decoupling capacitor |
VREF2 | 4 | — | Reference-2 voltage input, normally connected to VCC |