SBOS932C January   2020  – March 2021 THP210


  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Parameter Measurement Information
    1. 7.1 Characterization Configuration
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Super-Beta Input Bipolar Transistors
      2. 8.3.2 Power Down
      3. 8.3.3 Flexible Gain Setting
      4. 8.3.4 Amplifier Overload Power Limit
      5. 8.3.5 Unity Gain Stability
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 I/O Headroom Considerations
      2. 9.1.2 DC Precision Analysis
        1. DC Error Voltage at Room Temperature
        2. DC Error Voltage Over Temperature
      3. 9.1.3 Noise Analysis
      4. 9.1.4 Mismatch of External Feedback Network
      5. 9.1.5 Operating the Power-Down Feature
      6. 9.1.6 Driving Capacitive Loads
      7. 9.1.7 Driving Differential ADCs
        1. RC Filter Selection (Charge Kickback Filter)
        2. Settling Time Driving the ADC Sample-and-Hold Operating Behavior
        3. THD Performance
    2. 9.2 Typical Applications
      1. 9.2.1 MFB Filter
        1. Design Requirements
        2. Detailed Design Procedure
        3. Application Curve
      2. 9.2.2 ADS891x With Single-Ended RC Filter Stage
        1. Design Requirements
          1. Measurement Results
      3. 9.2.3 Attenuation Configuration Drives the ADS8912B
        1. Design Requirements
          1. Measurement Results
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Board Layout Recommendations
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Amplifier Overload Power Limit

During overload or fault conditions, many bipolar-based amplifiers draw significant (three to five times) quiescent current if the output voltage is clipped (meaning the output voltage becomes limited by the negative or positive supply rail).

The primary cause for this condition is that common-emitter output stages can consume excessive base current (up to 100x) when overdriven into saturation. In addition, the overload condition causes the feedback to be broken, which causes the slew boost to be permanently on. Depending on the slew boost circuit, this increases the tail current up to 4x.

The THP210 has an intelligent overload detection scheme that eliminates this problem, meaning that there is virtually no additional current consumption in the case of an overload event, represented in Figure 8-1. The protection circuit continuously monitors both the input and output stages of the amplifier. Figure 8-1 shows a measurements of the overload power limit behavior. If a large input voltage step (referred to as ΔVIN) is detected, the protection circuit checks for the presence of a rapid change in the voltage at the output (referred to as ΔVO). If the output is not changing because the output is clipped at supply rail, the protection circuit disables the slew-boost circuit and limit the base current of the predriver to prevent output saturation. After the overload condition is removed, the amplifier rapidly recovers to normal operating condition. Figure 8-1 indicates that in case of an overloaded output the current consumption at the supply pins (referred to I(VS+) and I(VS–)) does not exceed the limitations, and quickly recovers as soon as the overload condition has been removed.

GUID-0C55CE64-D75C-411D-9E43-31B603565269-low.gifFigure 8-1 Supply Current Change With Overloaded Outputs