SLLSFP5 January   2024 THVD2419 , THVD2429

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 ESD Ratings [IEC]
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Power Dissipation
    7. 6.7 Electrical Characteristics
    8. 6.8 Switching Characteristics_250kbps
    9. 6.9 Switching Characteristics_20Mbps
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 Electrostatic Discharge (ESD) Protection
      2. 8.3.2 Electrical Fast Transient (EFT) Protection
      3. 8.3.3 Surge Protection
      4. 8.3.4 Enhanced Receiver Noise Immunity
      5. 8.3.5 Failsafe Receiver
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Data Rate and Bus Length
        2. 9.2.1.2 Stub Length
        3. 9.2.1.3 Bus Loading
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Tape and Reel Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DRC|10
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.7 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted). All typical values are at 25°C and supply voltage of VCC = 5V, VIO = 3.3V , unless otherwise noted.  
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Driver
|VOD| Driver differential output voltage magnitude RL = 60Ω, –25V ≤ Vtest ≤ 25V (See Figure 7-1) 1.5 2.8 V
RL = 60Ω, –25V ≤ Vtest ≤ 25V, 4.5V ≤ VCC ≤ 5.5V (See Figure 7-1) 2.1 3.3 V
RL = 100Ω (See Figure 7-2) 2 2.9 V
RL = 54Ω (See Figure 7-2) 1.5 2.5 V
Δ|VOD| Change in differential output voltage RL = 54Ω or 100Ω (See Figure 7-2) –50 50 mV
VOC Common-mode output voltage RL = 54Ω or 100Ω (See Figure 7-2) 1 VCC/2 3 V
ΔVOC(SS) Change in steady-state common-mode output voltage RL = 54Ω or 100Ω (See Figure 7-2) –50 50 mV
IOS Short-circuit output current DE = VIO, -42V ≤ (VA or VB) ≤ 42V, or A shorted to B   –250 250 mA
Receiver
II Bus input current DE = 0 V, VCC and VIO = 0 V or 5.5 V VI = 12 V 75 125 μA
VI = 25 V 200 250 μA
VI = –7 V –100 –60 μA
VI = –25 V –350 –300 μA
VTH+ Positive-going input threshold voltage(1) Over common-mode range of ± 25 V 40 125 200 mV
VTH- Negative-going input threshold voltage(1) –200 –125 -40 mV
VHYS Input hysteresis 250 mV
VTH_FSH Input fail-safe threshold –40 40 mV
CA,B Input differential capacitance Measured between A and B, f = 1 MHz 50 pF
VOH Output high voltage IOH = –8 mA, VIO = 3 to 3.6 V or 4.5 V to 5.5 V VIO – 0.4 VIO – 0.2 V
VOL Output low voltage IOL = 8 mA, VIO = 3 to 3.6 V or 4.5 V to 5.5 V 0.2 0.4 V
VOH Output high voltage IOH = –4 mA, VIO = 1.65 to 1.95 V or 2.25 V to 2.75 V VIO – 0.4 VIO – 0.2 V
VOL Output low voltage IOL = 4 mA, VIO = 1.65 to 1.95 V or 2.25 V to 2.75 V 0.2 0.4 V
IOZ Output high-impedance current, R pin VO = 0 V or VIO, RE = VIO –1 1 µA
Logic
IIN Input current (DE , SLR) DRC: 1.65 V ≤ VIO ≤ 5.5 V, 0 V ≤ VIN ≤ VIO
D: 3 V  ≤ VCC ≤ 5.5 V, 0 V ≤ VIN ≤ 5.5 V		 5 µA
IIN Input current (D, RE) DRC: 1.65 V ≤ VIO ≤ 5.5 V, 0 V ≤ VIN ≤ VIO
D: 3 V  ≤ VCC ≤ 5.5 V, 0 V ≤ VIN ≤ 5.5 V		 –5 µA
Thermal Protection
TSHDN Thermal shutdown threshold Temperature rising 150 170 °C
THYS Thermal shutdown hysteresis 10 °C
Supply
UVVCC (rising) Rising under-voltage threshold on VCC 2.3 2.6 V
UVVCC (falling) Falling under-voltage threshold on VCC 1.95 2.2 V
UVVCC(hys) Hysteresis on under-voltage of VCC 170 mV
UVVIO (rising) Rising under-voltage threshold on VIO 1.4 1.6 V
UVVIO (falling) Falling under-voltage threshold on VIO 1.2 1.3 V
UVVIO(hys) Hysteresis on under-voltage of VIO 120 mV
ICC Supply current (quiescent), VCC = 4.5 V to 5.5 V Driver and receiver enabled RE = 0 V, DE = VIO, No load 3.5 5.3 mA
Driver enabled, receiver disabled RE = VIO, DE = VIO, No load 2.5 4.2 mA
Driver disabled, receiver enabled RE = 0 V, DE = 0 V, No load 1.8 2.4 mA
Driver and receiver disabled (D package, no VIO pin) RE = VCC, DE = 0 V, D = open, No load 0.1 5 µA
Driver and receiver disabled (DRC paclkage, with VIO pin) RE = VIO, DE = 0 V, D = open, No load 0.1 3 µA
ICC Supply current (quiescent), VCC = 3 V to 3.6 V Driver and receiver enabled RE = 0 V, DE = VIO, No load 3 4.1 mA
Driver enabled, receiver disabled RE = VIO, DE = VIO, No load 2 3 mA
Driver disabled, receiver enabled RE = 0 V, DE = 0 V, No load 1.6 2.2 mA
Driver and receiver disabled (D Package, no VIO) RE = VCC, DE = 0 V, D = open, No load TBD 4 µA
Driver and receiver disabled (DRC package, with VIO pin) RE = VIO, DE = 0 V, D = open, No load TBD 2 µA
IIO Logic supply current (quiescent), VIO = 3 to 3.6 V, DRC Package Driver disabled, Receiver enabled DE = 0 V, RE = 0 V, No load 3.3 8.4 µA
Driver disabled, Receiver disabled DE = 0 V, RE = VIO, No load 0.1 2 µA
(1) Under any specific conditions, VTH+ is specified to be at least VHYS higher than VTH–.