SLOS154C December 1995 – July 2025 TLC27L1 , TLC27L1A
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
Inadequate test time is a frequent problem, especially when testing CMOS devices in a high-volume, short-test-time environment. Internal capacitances are inherently higher in CMOS than in bipolar and BiFET devices and require longer test times than bipolar and BiFET devices. The problem becomes more pronounced with reduced supply levels and lower temperatures.