SLAS510F February   2007  – December 2016 TLV320AIC3104

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (Continued)
  6. Related Devices
  7. Pin Configuration and Functions
  8. Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 System Thermal Characteristics
    6. 8.6 Electrical Characteristics
    7. 8.7 Audio Data Serial Interface Timing Requirements
    8. 8.8 Typical Characteristics
  9. Parameter Measurement Information
  10. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Functional Block Diagram
    3. 10.3 Feature Description
      1. 10.3.1  Hardware Reset
      2. 10.3.2  Digital Audio Data Serial Interface
        1. 10.3.2.1 Right-Justified Mode
        2. 10.3.2.2 Left-Justified Mode
        3. 10.3.2.3 I2S Mode
        4. 10.3.2.4 DSP Mode
        5. 10.3.2.5 TDM Data Transfer
      3. 10.3.3  Audio Data Converters
        1. 10.3.3.1 Audio Clock Generation
        2. 10.3.3.2 Stereo Audio ADC
          1. 10.3.3.2.1 Stereo Audio ADC High-Pass Filter
          2. 10.3.3.2.2 Automatic Gain Control (AGC)
            1. 10.3.3.2.2.1 Target Level
            2. 10.3.3.2.2.2 Attack Time
            3. 10.3.3.2.2.3 Decay Time
            4. 10.3.3.2.2.4 Noise Gate Threshold
            5. 10.3.3.2.2.5 Maximum PGA Gain Applicable
      4. 10.3.4  Stereo Audio DAC
        1. 10.3.4.1 Digital Audio Processing for Playback
        2. 10.3.4.2 Digital Interpolation Filter
        3. 10.3.4.3 Delta-Sigma Audio DAC
        4. 10.3.4.4 Audio DAC Digital Volume Control
        5. 10.3.4.5 Increasing DAC Dynamic Range
        6. 10.3.4.6 Analog Output Common-mode Adjustment
        7. 10.3.4.7 Audio DAC Power Control
      5. 10.3.5  Audio Analog Inputs
      6. 10.3.6  Analog Fully Differential Line Output Drivers
      7. 10.3.7  Analog High-Power Output Drivers
      8. 10.3.8  Input Impedance and VCM Control
      9. 10.3.9  MICBIAS Generation
      10. 10.3.10 Short-Circuit Output Protection
      11. 10.3.11 Jack and Headset Detection
    4. 10.4 Device Functional Modes
      1. 10.4.1 Bypass Path Mode
        1. 10.4.1.1 Analog Input Bypass Path Functionality
        2. 10.4.1.2 ADC PGA Signal Bypass Path Functionality
        3. 10.4.1.3 Passive Analog Bypass During Power Down
      2. 10.4.2 Digital Audio Processing for Record Path
    5. 10.5 Programming
      1. 10.5.1 I2C Control Interface
        1. 10.5.1.1 I2C Bus Debug in a Glitched System
      2. 10.5.2 Register Map Structure
    6. 10.6 Register Maps
      1. 10.6.1 Output Stage Volume Controls
  11. 11Application and Implementation
    1. 11.1 Application Information
    2. 11.2 Typical Applications
      1. 11.2.1 Typical Connections With Headphone and External Speaker Driver in Cell Phone Application
        1. 11.2.1.1 Design Requirements
        2. 11.2.1.2 Detailed Design Procedure
        3. 11.2.1.3 Application Curves
      2. 11.2.2 Typical Connections for AC-Coupled Headphone Output With Separate Line Outputs and External Speaker Amplifier
        1. 11.2.2.1 Design Requirements
        2. 11.2.2.2 Detailed Design Procedure
        3. 11.2.2.3 Application Curves
  12. 12Power Supply Recommendations
  13. 13Layout
    1. 13.1 Layout Guidelines
    2. 13.2 Layout Example
  14. 14Device and Documentation Support
    1. 14.1 Receiving Notification of Documentation Updates
    2. 14.2 Community Resources
    3. 14.3 Trademarks
    4. 14.4 Electrostatic Discharge Caution
    5. 14.5 Glossary
  15. 15Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RHB|32
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Features

  • Stereo Audio DAC
    • 102-dBA Signal-to-Noise Ratio
    • 16-, 20-, 24-, or 32-Bit Data
    • Supports Sample Rates From 8 kHz to 96 kHz
    • 3D, Bass, Treble, EQ, or De-Emphasis Effects
    • Flexible Power Saving Modes and Performance are Available
  • Stereo Audio ADC
    • 92-dBA Signal-to-Noise Ratio
    • Supports Sample Rates From 8 kHz to 96 kHz
    • Digital Signal Processing and Noise Filtering Available During Record
  • Six Audio Input Pins
    • One Stereo Pair of Single-Ended Inputs
    • One Stereo Pair of Fully Differential Inputs
  • Six Audio Output Drivers
    • Stereo Fully Differential or Single-Ended Headphone Drivers
    • Fully Differential Stereo Line Outputs
  • Low Power: 14-mW Stereo 48-kHz Playback With 3.3-V Analog Supply
  • Ultra-Low-Power Mode With Passive Analog Bypass
  • Programmable I/O Analog Gains
  • Automatic Gain Control (AGC) for Record
  • Programmable Microphone Bias Level
  • Programmable PLL for Flexible Clock Generation
  • I2C Control Bus
  • Audio Serial Data Bus Supports I2S, Left- and Right-Justified, DSP, and TDM Modes
  • Extensive Modular Power Control
  • Power Supplies:
    • Analog: 2.7 V to 3.6 V.
    • Digital Core: 1.525 V to 1.95 V
    • Digital I/O: 1.1 V to 3.6 V
  • Package: 5-mm × 5-mm 32-Pin QFN

Applications

  • Digital Cameras
  • Smart Cellular Phones
  • PDAs
  • Portable Computing
  • Communication
  • Entertainment Applications

Description

The TLV320AIC3104 is a low-power stereo audio codec with stereo headphone amplifier, as well as multiple inputs and outputs that are programmable in single-ended or fully differential configurations. The device includes extensive register-based power control is included, thus enabling stereo 48-kHz DAC playback as low as 14 mW from a 3.3-V analog supply, making the device ideal for portable battery-powered audio and telephony applications.

The record path of the TLV320AIC3104 contains integrated microphone bias, digitally controlled stereo microphone preamplifier, and automatic gain control (AGC), with mix/mux capability among the multiple analog inputs. During record, programmable filters can remove audible noise that can occur during optical zooming in digital cameras. The playback path includes mix/mux capability from the stereo DAC and selected inputs, through programmable volume controls, to the various outputs.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TLV320AIC3104 VQFN (32) 5.00 mm × 5.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Simplified Diagram

TLV320AIC3104 simplifieddiagram_slas510.gif