SLVSI74A July   2025  – November 2025 TLV61290

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 System Characteristics
    7. 6.7 I2C Interface Timing Characteristics
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Output Voltage Setting
      2. 7.3.2 Switching frequency and Spread Spectrum Function
    4. 7.4 Device Functional Modes
      1. 7.4.1  Enable and Start-up
      2. 7.4.2  Operation Mode Setting
      3. 7.4.3  Bypass Mode
      4. 7.4.4  Boost Control Operation
      5. 7.4.5  Auto PFM Mode
      6. 7.4.6  Forced PWM Mode
      7. 7.4.7  Ultrasonic Mode
      8. 7.4.8  Output Discharge
      9. 7.4.9  Undervoltage Lockout
      10. 7.4.10 Current Limit Operation
      11. 7.4.11 Output Short-to-Ground Protection
      12. 7.4.12 Thermal Shutdown
      13. 7.4.13 Power-Good Indication Status
    5. 7.5 Programming
      1. 7.5.1 Data Validity
      2. 7.5.2 START and STOP Conditions
      3. 7.5.3 Byte Format
      4. 7.5.4 Acknowledge (ACK) and Not Acknowledge (NACK)
      5. 7.5.5 Target Address and Data Direction Bit
      6. 7.5.6 Single Read and Write
      7. 7.5.7 Multi-Read and Multi-Write
    6. 7.6 Register Maps
      1. 7.6.1 DeviceID Register
      2. 7.6.2 CONFIG Register
      3. 7.6.3 VOUTFLOORSET Register
      4. 7.6.4 ILIMBSTSET Register
      5. 7.6.5 VOUTROOFSET Register
      6. 7.6.6 STATUS Register
      7. 7.6.7 ILIMPTSET Register
      8. 7.6.8 BSTLOOP Register
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 TLV61290 with 2.5V-4.35V VIN, 3.4V VOUT, 4A Output Current
        1. 8.2.1.1 Design Requirement
        2. 8.2.1.2 Detailed Design Parameters
          1. 8.2.1.2.1 Inductor Selection
          2. 8.2.1.2.2 Output Capacitor
          3. 8.2.1.2.3 Input Capacitor
          4. 8.2.1.2.4 Checking Loop Stability
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
      3. 8.4.3 Thermal Information
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1.     79

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • YBG|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.4.2 Operation Mode Setting

The TLV61290 device can be configured (via the Section 7.6.5) to select the operating mode of the device.

When the EN pin is set to logic high, ENABLE bit (CONFIG[5:6]) = 01 (default value), the device enters normal mode(that is, automatic boost/bypass mode) and enables the output voltage to remain above a pre-defined target voltage.

When the EN pin is set to logic high, ENABLE bit (CONFIG[5:6]) = 10, the device enters forced bypass mode. In this mode, the synchronous rectifier is current limited to ca. 10A (programmable via I2C) allowing an external load (for example audio amplifier) to be powered with a restricted supply. The output voltage is slightly reduced due to voltage drop across the bypass MOSFET. The device consumes only a standby current of 30µA (typ).

When the EN pin is set to logic high, and ENABLE bit (CONFIG[5:6]) = 11 forces the device in shutdown mode, but I2C block works, with a standby current of typically 16µA. In this mode, true load disconnect between the battery and load prevents current flow from VIN to VOUT, as well as reverse current flow from VOUT to VIN.

When the EN pin is set to logic low forces the device in shutdown mode (regardless of what ENABLE bit is), with a shutdown current of typically 0.8µA. In this mode, true load disconnect between the battery and load prevents current flow from VIN to VOUT, as well as reverse current flow from VOUT to VIN.

Table 7-3 Mode of Operation
EN pinENABLE bitOperation Mode

Low

xxShutdown mode. True load disconnection and no VOUT. The device shutdown current is approximately 0.8μA typ.
High11I2C shutdown mode. Power stage is turned off and no VOUT, but I2C is active. True load disconnection. The device standby current in this mode is approximately 16μA typ.
High10Forced bypass mode. VOUT follows VIN. The device standby current is approximately 30μA typ.
High00/01 (default 01)Automatic boost/bypass mode. In boost mode, VOUT = VOUT_TAR (default 3.4V). In bypass mode, VOUT follows VIN.