The eCAP module can be used in systems where accurate timing of external events is important. eCAP/HRCAP on this device is Type-2.
Applications for eCAP include:
- Speed measurements of rotating machinery (for example, toothed sprockets sensed through Hall sensors)
- Elapsed time measurements between position sensor pulses
- Period and duty cycle measurements of pulse train signals
- Decoding current or voltage amplitude derived from duty cycle encoded current/voltage sensors
The eCAP module includes the following features:
- 4-event time-stamp registers (each 32 bits)
- Edge-polarity selection for up to four sequenced time-stamp capture events
- Interrupt on either of the four events
- Single shot capture of up to four event timestamps
- Continuous mode capture of timestamps in a four-deep circular buffer
- Absolute time-stamp capture
- Difference (Delta) mode time-stamp capture
- All of the above resources dedicated to a single input pin
- When not used in capture mode, the eCAP module can be configured as a single-channel PWM output (APWM).
The capture functionality
of the Type-1 eCAP is enhanced from the Type-0 eCAP with the following added features:
- Event filter reset bit
- Writing a 1 to ECCTL2[CTRFILTRESET] will clear the event filter, the modulo counter, and any pending interrupts flags. Resetting the bit is useful for initialization and debug.
- Modulo counter status bits
- The modulo counter (ECCTL2 [MODCTRSTS]) indicates which capture register will be loaded next. In the Type-0 eCAP, it was not possible to know current state of modulo counter.
- DMA trigger source
- eCAPxDMA is added as a DMA trigger. CEVT[1–4] can be configured as the source for eCAPxDMA.
- Input multiplexer
- ECCTL0 [INPUTSEL] selects one of 128 input
- EALLOW protection
- EALLOW protection is added to critical registers. To maintain software compatibility with the Type-0 eCAP, configure DEV_CFG_REGS.ECAPTYPE to make these registers unprotected.
The capture functionality of the Type-2 eCAP is enhanced from the Type-1 eCAP with the following added features:
- ECAPxSYNCINSEL register
- The ECAPSxYNCINSEL register is added for each eCAP to select an external SYNCIN. Every eCAP can have a separate SYNCIN signal.
The eCAP inputs connect to any GPIO input through
the Input X-BAR. The APWM outputs connect to GPIO pins through the
Output X-BAR to OUTPUTx positions in the GPIO mux. See Section 6.4.3 and Section 6.4.4.
The eCAP module is clocked by PERx.SYSCLK.
The clock enable bits (ECAP1–ECAP3) in the PCLKCR3 register turn off the eCAP module individually (for low-power operation). Upon reset, ECAP1ENCLK is set to low, indicating that the peripheral clock is off.