There is no timing dependency between the ramp of the VCCIO and the VCC supply voltage. The power-up sequence starts with the I/O voltage rising above the minimum I/O supply threshold, (for more details, see Table 6-4), core voltage rising above the minimum core supply threshold, and the release of power-on reset. The high-frequency oscillator will start up first and its amplitude will grow to an acceptable level. The oscillator start-up time is dependent on the type of oscillator and is provided by the oscillator vendor. The different supplies to the device can be powered up in any order.
During power up, the device goes through the sequential phases listed in Table 6-3.
|Oscillator start-up and validity check||1032 oscillator cycles|
|eFuse autoload||1160 oscillator cycles|
|Flash pump power up||688 oscillator cycles|
|Flash bank power up||617 oscillator cycles|
|Total||3497 oscillator cycles|
The CPU reset is released at the end of this sequence and fetches the first instruction from address 0x00000000.