SLVSFJ3C May   2022  – October 2023 TPS62870-Q1 , TPS62871-Q1 , TPS62872-Q1 , TPS62873-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Description (continued)
  7. 6 Device Options
  8. 7 Pin Configuration and Functions
  9. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 I2C Interface Timing Characteristics
    7. 8.7 Timing Requirements
    8. 8.8 Typical Characteristics
  10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Fixed-Frequency DCS Control Topology
      2. 9.3.2  Forced PWM and Power Save Modes
      3. 9.3.3  Precise Enable
      4. 9.3.4  Start-Up
      5. 9.3.5  Switching Frequency Selection
      6. 9.3.6  Output Voltage Setting
        1. 9.3.6.1 Output Voltage Range
        2. 9.3.6.2 Output Voltage Setpoint
        3. 9.3.6.3 Non-Default Output Voltage Setpoint
        4. 9.3.6.4 Dynamic Voltage Scaling
      7. 9.3.7  Compensation (COMP)
      8. 9.3.8  Mode Selection and Clock Synchronization (MODE/SYNC)
      9. 9.3.9  Spread Spectrum Clocking (SSC)
      10. 9.3.10 Output Discharge
      11. 9.3.11 Undervoltage Lockout (UVLO)
      12. 9.3.12 Overvoltage Lockout (OVLO)
      13. 9.3.13 Overcurrent Protection
        1. 9.3.13.1 Cycle-by-Cycle Current Limiting
        2. 9.3.13.2 Hiccup Mode
        3. 9.3.13.3 Current Limit Mode
      14. 9.3.14 Power Good (PG)
        1. 9.3.14.1 Standalone or Primary Device Behavior
        2. 9.3.14.2 Secondary Device Behavior
      15. 9.3.15 Remote Sense
      16. 9.3.16 Thermal Warning and Shutdown
      17. 9.3.17 Stacked Operation
    4. 9.4 Device Functional Modes
      1. 9.4.1 Power-On Reset
      2. 9.4.2 Undervoltage Lockout
      3. 9.4.3 Standby
      4. 9.4.4 On
    5. 9.5 Programming
      1. 9.5.1 Serial Interface Description
      2. 9.5.2 Standard, Fast, Fast Mode Plus Protocol
      3. 9.5.3 I2C Update Sequence
      4. 9.5.4 I2C Register Reset
    6. 9.6 Register Map
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Selecting the Inductor
        2. 10.2.2.2 Selecting the Input Capacitors
        3. 10.2.2.3 Selecting the Compensation Resistor
        4. 10.2.2.4 Selecting the Output Capacitors
        5. 10.2.2.5 Selecting the Compensation Capacitor, CC
        6. 10.2.2.6 Selecting the Compensation Capacitor, CC2
      3. 10.2.3 Application Curves
    3. 10.3 Best Design Practices
    4. 10.4 Power Supply Recommendations
    5. 10.5 Layout
      1. 10.5.1 Layout Guidelines
      2. 10.5.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.3.2 Forced PWM and Power Save Modes

The device can control the inductor current in three different ways to regulate the output:

  • Pulse-width modulation with continuous inductor current (PWM-CCM)
  • Pulse-width modulation with discontinuous inductor current (PWM-DCM)
  • Pulse-frequency modulation with discontinuous inductor current and pulse skipping (PFM-DCM)

During PWM-CCM operation, the device switches at a constant frequency and the inductor current is continuous (see Figure 9-2). PWM operation achieves the lowest output voltage ripple and the best transient performance.


GUID-58DC2495-40DA-40D5-A37F-DFF17B76F24D-low.svg

Figure 9-2 Continuous Conduction Mode (PWM-CCM) Current Waveform

During PWM-DCM operation, the device switches at a constant frequency and the inductor current is discontinuous (see Figure 9-3). In this mode, the device controls the peak inductor current to maintain the selected switching frequency while still being able to regulate the output.


GUID-7CCB3C4D-DD7E-4D75-90D7-51C47EB7FFF5-low.svg

Figure 9-3 Discontinuous Conduction Mode (PWM-DCM) Current Waveform

During PFM-DCM operation, the device keeps the peak inductor current constant (at a level corresponding to the minimum on time of the converter) and skips pulses to regulate the output (see Figure 9-4). The switching pulses that occur during PFM-DCM operation are synchronized to the internal clock.

GUID-9007201F-1E85-465F-B268-56E19DE5ACAE-low.svgFigure 9-4 Discontinuous Conduction Mode (PFM-DCM) Current Waveform

For very small output voltages, an absolute minimum on time of approximately 50 ns reduces the switching frequency from the set value. Figure 8-5 shows the maximum switching frequency with 3.3-V and 5.5-V supplies.

Use Equation 1 to calculate the output current threshold at which the device enters PFM-DCM.

Equation 1. IOUT(PFM)=VIN–VOUT2LtON2VINVOUTfsw

Figure 9-5 shows how this threshold typically varies with VIN and VOUT for a switching frequency of 2.25 MHz.

GUID-20230804-SS0I-PMTZ-KC9M-M3QJQPFM1KXZ-low.svgFigure 9-5 Output Current PFM-DCM Entry Threshold
The user can configure the device to use either forced PWM (FPWM) mode or power save mode (PSM):
  • In forced PWM mode, the device uses PWM-CCM at all times.
  • In power save mode, the device uses PWM-CCM at medium and high loads, PWM-DCM at low loads, and PFM-DCM at very low loads. The transition between the different operating modes is seamless.

Table 9-1 shows the function table of the MODE/SYNC pin and the FPWMEN bit in the CONTROL1 register, which control the operating mode of the device.

Table 9-1 FPWM Mode and Power-Save Mode Selection
MODE/SYNC PinFPWMEN BitOperating ModeRemark
Low0PSMDo not use in a stacked configuration.
1FPWM
HighXFPWM
Sync ClockXFPWM