SLVSGG8 November   2023 TPS6287B10 , TPS6287B25

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Options
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing Characteristics
    7. 6.7 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Fixed-Frequency DCS-Control Topology
      2. 8.3.2  Forced-PWM and Power-Save Modes
      3. 8.3.3  Transient Non-Synchronous Mode (optional)
      4. 8.3.4  Precise Enable
      5. 8.3.5  Start-Up
      6. 8.3.6  Output Voltage Setting
        1. 8.3.6.1 Output Voltage Range
        2. 8.3.6.2 Output Voltage Setpoint
        3. 8.3.6.3 Non-Default Output Voltage Setpoint
        4. 8.3.6.4 Dynamic Voltage Scaling
        5. 8.3.6.5 Droop Compensation
      7. 8.3.7  Compensation (COMP)
      8. 8.3.8  Mode Selection / Clock Synchronization (MODE/SYNC)
      9. 8.3.9  Spread Spectrum Clocking (SSC)
      10. 8.3.10 Output Discharge
      11. 8.3.11 Undervoltage Lockout (UVLO)
      12. 8.3.12 Overvoltage Lockout (OVLO)
      13. 8.3.13 Overcurrent Protection
        1. 8.3.13.1 Cycle-by-Cycle Current Limiting
        2. 8.3.13.2 Hiccup Mode
        3. 8.3.13.3 Current-Limit Mode
      14. 8.3.14 Power Good (PG)
        1. 8.3.14.1 Standalone / Primary Device Behavior
        2. 8.3.14.2 Secondary Device Behavior
      15. 8.3.15 Remote Sense
      16. 8.3.16 Thermal Warning and Shutdown
      17. 8.3.17 Stacked Operation
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-On Reset
      2. 8.4.2 Undervoltage Lockout
      3. 8.4.3 Standby
      4. 8.4.4 On
    5. 8.5 Programming
      1. 8.5.1 Serial Interface Description
      2. 8.5.2 Standard-, Fast-, Fast-Mode Plus Protocol
      3. 8.5.3 HS-Mode Protocol
      4. 8.5.4 I2C Update Sequence
      5. 8.5.5 I2C Register Reset
      6. 8.5.6 Dynamic Voltage Scaling (DVS)
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 Selecting the Input Capacitors
        3. 9.2.2.3 Selecting the Compensation Resistor
        4. 9.2.2.4 Selecting the Output Capacitors
        5. 9.2.2.5 Selecting the Compensation Capacitor CC
        6. 9.2.2.6 Selecting the Compensation Capacitor CC2
      3. 9.2.3 Application Curves
    3. 9.3 Typical Application - TPS6287BxV Devices
      1. 9.3.1 Design Requirements for TPS6287BxV
    4. 9.4 Typical Application Using Two TPS6287B25 in a Stacked Configuration
      1. 9.4.1 Design Requirements For Two Stacked Devices
      2. 9.4.2 Detailed Design Procedure
        1. 9.4.2.1 Selecting the Compensation Resistor
        2. 9.4.2.2 Selecting the Output Capacitors
        3. 9.4.2.3 Selecting the Compensation Capacitor CC
      3. 9.4.3 Application Curves for Two Stacked Devices
    5. 9.5 Typical Application Using Three TPS6287B25 in a Stacked Configuration
      1. 9.5.1 Application Curves
    6. 9.6 Power Supply Recommendations
    7. 9.7 Layout
      1. 9.7.1 Layout Guidelines
      2. 9.7.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Device Registers
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.2 Forced-PWM and Power-Save Modes

The device can control the inductor current in three different ways to regulate the output:

  • Pulse-width modulation with continuous inductor current (PWM-CCM)
  • Pulse-width modulation with discontinuous inductor current (PWM-DCM)
  • Pulse-frequency modulation with discontinuous inductor current and pulse skipping (PFM-CCM)

During PWM-CCM operation, the device switches at a constant frequency and the inductor current is continuous (see Figure 8-2). PWM operation achieves the lowest output voltage ripple and the best transient performance.


GUID-58DC2495-40DA-40D5-A37F-DFF17B76F24D-low.svg

Figure 8-2 Continuous Conduction Mode (CCM) Current Waveform

During PWM-DCM operation the device switches at a constant frequency and the inductor current is discontinuous (see Figure 8-3). In this mode the device controls the peak inductor current to maintain the selected switching frequency while still being able to regulate the output.


GUID-7CCB3C4D-DD7E-4D75-90D7-51C47EB7FFF5-low.svg

Figure 8-3 Discontinuous Conduction Mode (DCM) Waveform

During PFM-DCM operation the device keeps the peak inductor current constant (at a level corresponding to the minimum on-time of the converter) and skips pulses in order to regulate the output (see Figure 8-4). The switching pulses that occur during PFM-DCM operation are synchronized to the internal clock.

.
GUID-9007201F-1E85-465F-B268-56E19DE5ACAE-low.svg Figure 8-4 Discontinuous Conduction Mode (PFM-DCM) Current Waveform

Use Equation 1 to calculate the output current threshold at which the device enters PFM-DCM:

Equation 1. I O U T ( P F M ) = V I N – V O U T 2 L t O N 2 V I N V O U T f s w

Figure 8-5 shows how this threshold typically varies with VIN and VOUT for a switching frequency of 1.5 MHz.

GUID-20231002-SS0I-RKTC-JCTB-LM5WRRVDSZW5-low.svg Figure 8-5 Output Current PFM-DCM Entry Threshold for fSW = 1.5 MHz
You can configure the device to use either Forced-PWM (FPWM) mode or Power-Save Mode (PSM):

  • In Forced-PWM mode the device uses PWM-CCM at all times
  • In Power-Save Mode the device uses PWM-CCM at medium and high loads, PWM-DCM at low loads, and PFM-DCM at very low loads. Transition between the different operating modes is seamless.

Table 8-1 shows the function table of the MODE/SYNC pin and the FPWMEN bit in the CONTROL1 register, which control the operating mode of the device.

Table 8-1 FPWM Mode and Power-Save Mode Selection
MODE/SYNC Pin FPWMEN Bit Operating Mode Remark
Low 0 PSM Do not use in a stacked configuration
1 FPWM
High X FPWM
Sync Clock X FPWM