SBVS065L December   2005  – December 2024 TPS74301

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configurations and Functions
    1.     Pin Descriptions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Enable/Shutdown
      2. 6.3.2 Power-Good (QFN Package Only)
      3. 6.3.3 Internal Current Limit
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
      3. 6.4.3 Disabled
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Input, Output, and Bias Capacitor Requirements
      2. 7.1.2 Transient Response
      3. 7.1.3 Dropout Voltage
      4. 7.1.4 Programmable Sequencing With Track
      5. 7.1.5 Sequencing Requirements
    2. 7.2 Typical Application
      1. 7.2.1 Adjustable Voltage Part and Setting
        1.       34
      2. 7.2.2 Design Requirements
      3. 7.2.3 Detailed Design Procedure
      4. 7.2.4 Application Performance Plots
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 Layout Recommendations and Power Dissipation
      2. 7.4.2 Layout Example
      3. 7.4.3 Thermal Protection
      4. 7.4.4 Estimating Junction Temperature
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
      2. 8.1.2 Device Nomenclature
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.1.5 Sequencing Requirements

The device can have VIN, VBIAS, VEN, and VTRACK sequenced in any order without causing damage to the device. However, for the track function to work as intended, certain sequencing rules must be applied. VBIAS must be present and the device enabled before the track signal starts to ramp. VIN must ramp up faster than the external supply being tracked so that the tracking signal does not drive the device into VIN dropout as VOUT ramps up. The preferred method to sequence the tracking device is to have VIN, VBIAS, and VEN above the minimum required voltages before enabling the master supply to initiate the startup sequence. This method is illustrated in Figure 7-3. Resistors R3 and R4 disable the master supply until the input voltage is above 3.52V (typical).

If the TRACK pin is not needed the pin must be connected to VIN for the legacy chip, for the new chip this pin can be left floating. Configured in this way, the device starts up typically within 40μs (legacy chip) or 100µs (new chip), which can result in large inrush current that can cause the input supply to droop. If soft-start is needed, consider the TPS742 or TPS744 devices.

Note: NOTE: When VBIAS and VEN are present and VIN is not supplied, this device outputs approximately 50μA of current from OUT. Although this condition does not cause any damage to the device, the output current can charge up the OUT node if total resistance between OUT and GND (including external feedback resistors) is greater than 10kΩ.