SBVS065L December   2005  – December 2024 TPS74301

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configurations and Functions
    1.     Pin Descriptions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Enable/Shutdown
      2. 6.3.2 Power-Good (QFN Package Only)
      3. 6.3.3 Internal Current Limit
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
      3. 6.4.3 Disabled
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Input, Output, and Bias Capacitor Requirements
      2. 7.1.2 Transient Response
      3. 7.1.3 Dropout Voltage
      4. 7.1.4 Programmable Sequencing With Track
      5. 7.1.5 Sequencing Requirements
    2. 7.2 Typical Application
      1. 7.2.1 Adjustable Voltage Part and Setting
        1.       34
      2. 7.2.2 Design Requirements
      3. 7.2.3 Detailed Design Procedure
      4. 7.2.4 Application Performance Plots
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 Layout Recommendations and Power Dissipation
      2. 7.4.2 Layout Example
      3. 7.4.3 Thermal Protection
      4. 7.4.4 Estimating Junction Temperature
  9. Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
      2. 8.1.2 Device Nomenclature
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Transient Response

The TPS743 is designed to have transient response within 5% for most applications without any output capacitor. In some cases, the transient response can be limited by the transient response of the input supply. This limitation is especially true in applications where the difference between the input and output is less than 300mV. In this case, adding additional input capacitance improves the transient response much more than just adding additional output capacitance. With a solid input supply, adding additional output capacitance reduces undershoot and overshoot during a transient at the expense of a slightly longer VOUT recovery time. Refer to Output Load Transient Response in the Typical Characteristics section. Because the legacy chip is stable without an output capacitor and the new chip is stable with output capacitors ≥ 2.2μF, many applications can allow for little or no capacitance at the LDO output. For these applications, local bypass capacitance for the device under power can be sufficient to meet the transient requirements of the application. This design reduces the total solution cost by avoiding the need to use expensive high-value capacitors at the LDO output.